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Delta-Sigma ADC FFT peaks

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Ayman Essam

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Hi
i designed a Delta sigma ADC ( switch-cap), with the FFT plot attached, the issue is i don't understand why such peaks exist (my Fin = 3.3 Khz, my Sampling Freq = 100KHz) BT.png
 

Hi,

* 100kHz sampling frequency and 8129 samples measn you have a window size of 81.29ms.
* 3.3kHz means you have a period time of 0.30303ms

* now divide both: 81.29ms / 0.30303ms = 268.257 ... this is by far no integer value. It is not 268.000 and not 269.000

--> you need to use a window function before you perform the FFT. Hanning, Hamming, Blackman-Harris or other. Each has it´s benefits and it´s drawbacks.

But best is you use an input frequency that is a pure integer multiple of 1/81.29 ms = 12.3016 Hz and is derived from the same clock source as the sampling clock.

Klaus
 
hi
thank you for your help

regarding what you say " But best is you use an input frequency that is a pure integer multiple of 1/81.29 ms = 12.3016 Hz and is derived from the same clock source as the sampling clock."
do i have to chose prime odd number ? odd? even ? any integer ?
 

Hi,

just integer.

to get about 3.3kHz: --> use 268 or 269

Klaus
 

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