Question about MOSFET model options in a commercial process.

I recently got approved to use the TSMC 0.18 um PDK for my academic work and I had some questions about the MOSFET models included as options. This is my first time using a commercial foundry PDK and I couldn't find the answers to the questions I had by reading the documentation included.

1) The PDK has the usual core and I/O device options with differing VDD and tox. In this case 1.8V vdd and 3.3V respectively. They also have nominal, medium and native options. If I arrange these options in the decreasing order for Vth, is it nominal > medium > native?

If this order is right, then you would use native for greater speed and nominal for less leakage and less power consumption. Is this right?

2) Along with nominal, medium and native options, there are macros NMOS , macro PMOS options for both 1.8V and 3.3V devices. What are these macro NMOS and PMOS device models and what are they used for? Are they similar to IP macros but just transistors instead of IP blocks?

3) The PDK also contains 3.3 V analog NMOS and PMOS options. Are these the only models meant ( at least encouraged by the foundry) for analog/RF design? If one creates analog circuits using the 1.8 V models, is that a problem?

4) I understand that PDKs come with core and I/O device options which have different VT and tox, with I/O device options having higher VDDs and usually having larger L ( at least for the TSMC 0.18 um ). I have read that designers would make analog /RF designs with these I/O devices. If one does that , can he/she still claim that their design was fabricated with 0.18 um process technology. I guess what I am getting at it is that if my academic research consists a design optimized with a MOSFET model which is not the core one, can it still be counted as a 0.18 um node design?

1) yes
2) yes; also native NMOS for RF switches and active amplifiers
3) you can use 1.8V if signal range and supply are that low.
But beware peculiar nonidealities that may attend "digital"
device structures.
4) You can claim what you like, the "technology" is what it is
and generally speaks about the smallest possible feature,
not the most-used (though often it also is) or even the
shortest channel length used. The actual processing is a
provable fact, regardless.

dick_freebird said:

1) yes
2) yes; also native NMOS for RF switches and active amplifiers
3) you can use 1.8V if signal range and supply are that low.
But beware peculiar nonidealities that may attend "digital"
device structures.
4) You can claim what you like, the "technology" is what it is
and generally speaks about the smallest possible feature,
not the most-used (though often it also is) or even the
shortest channel length used. The actual processing is a
provable fact, regardless.

Click to expand...

thanks for the quick reply. some follow up ones.
1) Could you clarify what you mean by active amplifiers? I have read that Zero Vt/ Native devices are also used for source followers. Is this because it reduces the voltage drop ?
2) could you give an example of where these NMOS and PMOS macro device options would be used in the design flow? How do they help in the design process?