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How to merge 2 LEF designs in Synopsys IC Compiler II?

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majd229

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Hi, Im trying to merge 2 lefs together. after loading tech and stuff, im doing:
read_lef lef1.lef
read_lef lef2.lef
write_lef merged.lef
but the output lef doesnt have any pins or anything, just layer information. How can i merge the 2 lefs together properly? cant find much on solvnet.
Thanks

- - - Updated - - -

i tried:

read_lef lef1.lef
read_lef lef2.lef
check_workspace
write_lef merged.lef

it printed out one lef but with 2 separate macros and all their pins. however, i only want it to have one top macro. so inside the lef there would be one MACRO statement and all the pins of the 2 lefs combined under it. right now it has 2 MACRO statements and each macro has its own pins. how can i make it one topcell macro?
 

that's not how it works. you are using a physical design tool to merge 2 layout abstractions. that's not how we design things.

lef/def files can be used in hierarchical form, I would struggle to understand why you need to merge 2 files.
 

ThisIsNotSam said:
that's not how it works. you are using a physical design tool to merge 2 layout abstractions. that's not how we design things.

lef/def files can be used in hierarchical form, I would struggle to understand why you need to merge 2 files.
Click to expand...

I have 2 macros GDS and LEFs. For some long reasons, I need to merge the 2 GDS separately and the 2 LEFs separately into 1 cell to run analysis on, because the two macros complement each others (ESD pads and actual macro). Does this make sense?
 

It doesn't. Merge the 2 GDS files, then export a new combined LEF using your preferred layout editor. remember: a lef is just a simplified layout abstraction. if you have the real layout, you can generate everything you need from it.
 
ThisIsNotSam said:
It doesn't. Merge the 2 GDS files, then export a new combined LEF using your preferred layout editor. remember: a lef is just a simplified layout abstraction. if you have the real layout, you can generate everything you need from it.
Click to expand...

you can export LEF from GDS? I thought LEF is created before the GDS, and after the schematic. Which tools let you generate LEF from GDS?
 

You don't need to merge two GDSs. You have two LEFs - good, it means you have two instances that can be overlapped. I suppose, you also have separate timing models (.lib) for them. So, make a design, that contains these two instances. And analyse it.
 

oratie said:
You don't need to merge two GDSs. You have two LEFs - good, it means you have two instances that can be overlapped. I suppose, you also have separate timing models (.lib) for them. So, make a design, that contains these two instances. And analyse it.
Click to expand...

that's is the thing though, OP is not trying to design. he is trying to merge.
 

ThisIsNotSam said:
It doesn't. Merge the 2 GDS files, then export a new combined LEF using your preferred layout editor. remember: a lef is just a simplified layout abstraction. if you have the real layout, you can generate everything you need from it.
Click to expand...

I can merge the 2 GDS easy. But how do you go from GDS to lef? Im trying to use a flow at my work disposal but it needs a verilog interface file (called verilog stub or vshell) that contains the top pins. But i dont have that for the merged version. What tools can go from GDs to lef directly?
 

ThisIsNotSam said:
abstract generator from cadence will do it
Click to expand...

My flow that i was talking about is actually virtuoso. Im getting an error:
INFO: Streamin to create new layout view...
INFO: Creating abstract view ...
ERROR: Layout view does not have any pins or labels.
Abstract generation failed.

Its not seeing any pins or labels but i can clearly see them in the merged gds i supplied. Do you have any idea?
 

Make sure pins are using the right layer. Many pdks have special layers for pins/labels.
 

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