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  1. #1
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    Processes and concurrent signal assignments

    Hello there,

    I have a question regarding ARCHITECTURES in VHDL.

    1. Can processes be used along with concurrent signal assignments under the same architecture?
    I think yes, please let me know if otherwise.

    Also,
    2. Are processes behavioural or structural?
    No clue about this one.

    Thanks in advance :)

    •   Alt24th August 2017, 00:57

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  2. #2
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    Re: Processes and concurrent signal assignments

    1. Yes. But ensure you don't drive the same signal in multiple places.

    2.behavioural. though in reality all code will have behavioural and structural elements, so separating the two is never helpful.



    •   Alt24th August 2017, 08:07

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  3. #3
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    Re: Processes and concurrent signal assignments

    It's my first time trying this analogy sooooo bare with me...think of it this way.

    The architecture body shall be the boundary of our city.

    Within the city boundaries we have many buildings (component instantiations). These can all operate concurrently.
    Think of all the concurrent signal assignments as roads.

    Now imagine someone comes along and adds traffic lights. Therefore hindering flow in the x, y direction. This is where sequential events take place within a process.

    The main point being.... our city can have all these things.

    However it's good coding practices to have structural architectures which instantiate components with behavioural architectures.
    What this would mean is someone would make a component of our traffic light process and instantiate that in situ of the process in the top level city view.



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