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  1. #1
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    SuperCap in Xilinx Zynq

    Hello guys,

    I need to gurantee the supply of the Xilinx Zynq for 0.5 sec before the chip is shutted down because whichever current supply problem.The reason is because I need to save some important data in memory. The question is if there is some way to keep the chip alive during a minimum time. I have been having a look and the Xilinx Zynq 7020 has a VBAT pin, but I think that it is not valid for my purpose...

    Any idea??

    Greetings,

    EP

    •   Alt22nd August 2017, 07:35

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  2. #2
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    Re: SuperCap in Xilinx Zynq

    Hi,

    what is your power source? --> try to generate an early_power_fail_signal.

    Maybe: AC --> rectifier --> bulk capacitor --> stepDown --> FPGA
    Try to detect AC_loss.
    * generate in interrupt
    * switch OFF all unnecessary load
    Then the bulk capacitor needs to provide the mount of energy
    The step down will keep the FPGA supply stable.

    ****
    some calculation:
    Lets say you have a 0.1F supercap connected to 3V3.
    On power loss maybe you can work down to 2.8V before a reset is asserted.
    The available energy is (0.5 * 3.3V * 3.3V * 0.1F) - (0.5 * 2.8V * 2.8V * 0.1F) = 0.1525Ws
    This is only 28% of the initially available capacitor energy.
    And the voltage is continously falling.

    Let´s say you have a 12V supply and a stepdown that works down to 4V input voltage.
    Then you can use 89% of the available capacitor energy ... and the FPGA voltage is constant.
    0.152Ws / (80% SMPS_efficiency * 89% capacitor_usage) = 0.215Ws capacitor energy @12V
    --> use a 3300uF capacitor at 12V

    Klaus



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