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Avery AXI_SLAVE warning

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muthu7495

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Hi,
Can you please someone explain the following warning.

AAXI_WARN: slave0@20548811.0 ps : Write bad address 'h000000e0, will return SLVERR. Configured address is below:
Address in FIFO: [0] 5a43, [1] 5a46,
cfg_info.base_address[0], cfg_info.limit_address[0]: [90000000, 90100000]


For the above configuration what address range I can able to pass from master.I am new axi_protocol.Please guide me ...



Thanks
venkat
 

The msg you have posted indicates that the address 'h000000e0 does not belong to the slave. Due to invalid address the address_decoder will assert SLVERR.

For the above configuration what address range I can able to pass from master.I am new axi_protocol.Please guide me ...
Do you have any docu for the axi slave you are trying to simulate? You must find out between which address ranges does this axi slave lie.
Get the memory map from someone who has it.

It might be that the slave is valid from address 0x90000000 to 0x90100000. Just try out this address range, and if you don't get this message anymore then you are probably good to go.

I can't comment what this means -
Address in FIFO: [0] 5a43, [1] 5a46,
 
The msg you have posted indicates that the address 'h000000e0 does not belong to the slave. Due to invalid address the address_decoder will assert SLVERR.


Do you have any docu for the axi slave you are trying to simulate? You must find out between which address ranges does this axi slave lie.
Get the memory map from someone who has it.

It might be that the slave is valid from address 0x90000000 to 0x90100000. Just try out this address range, and if you don't get this message anymore then you are probably good to go.

I can't comment what this means -


Thanks for reply dpaul. The address range for the slave is 0x0000_0000 to ffff_ffff asper design. I am giving e0 only. It is in the slave address range only. Any way i will try address range between 0x9000_0000 and 0x9010_0000.


Thanks
Venkat
 

You message shows only a Warning.
have you viewed the simulation waveforms to see what is actually happening?

In any case track down where the address_decoder is located and see the axi signal responses when the master issues a valid address.
 

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