[moved] Verilog A zero diagonal found in jacobian error

npsnpsnps · Aug 17, 2017

Hello,

I am writing a veriloga code for a digital PID compensator. But I am getting "Zero diagonal found in jacobian" error. Please help me out in solving this. There are no floating nets in my schematic. Below is my code and the error while simulating.

Code

Code Verilog - [expand]
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`include "discipline.h"
`include "constants.h"
 
module pidnew(comp_out0, comp_out1, comp_out2, comp_out3, comp_out4, comp_out5, err_in0, err_in1, err_in2, err_in3, err_in4, err_in5, clk, reset);
input err_in0, err_in1, err_in2, err_in3, err_in4, err_in5;
input clk, reset;
output comp_out0, comp_out1, comp_out2, comp_out3, comp_out4, comp_out5;
 
electrical err_in0, err_in1, err_in2, err_in3, err_in4, err_in5;
electrical clk, reset;
electrical comp_out0, comp_out1, comp_out2, comp_out3, comp_out4, comp_out5;
 
parameter real k1 = 12 from [0:inf);
parameter real k2 = 10 from [0:inf);
parameter real k3 = 2 from [0:inf);
 
parameter real trise = 100p from (0:inf);
parameter real tfall = 100p from (0:inf);
parameter real vtrans = 0.5;
 
electrical [5:0] comp_prev;
electrical [5:0] err_prev1;
electrical [5:0] err_prev2;
genvar i;
    
analog begin 
 
                V(comp_out5) <+ transition(V(comp_prev[5]) + k1 * V(err_in5) - k2 * V(err_prev1[5]) + k3 * V(err_prev2[5]), trise, tfall) ;
                V(comp_out4) <+ transition(V(comp_prev[4]) + k1 * V(err_in4) - k2 * V(err_prev1[4]) + k3 * V(err_prev2[4]), trise, tfall) ;
                V(comp_out3) <+ transition(V(comp_prev[3]) + k1 * V(err_in3) - k2 * V(err_prev1[3]) + k3 * V(err_prev2[3]), trise, tfall) ;
                V(comp_out2) <+ transition(V(comp_prev[2]) + k1 * V(err_in2) - k2 * V(err_prev1[2]) + k3 * V(err_prev2[2]), trise, tfall) ;
                V(comp_out1) <+ transition(V(comp_prev[1]) + k1 * V(err_in1) - k2 * V(err_prev1[1]) + k3 * V(err_prev2[1]), trise, tfall) ;
                V(comp_out0) <+ transition(V(comp_prev[0]) + k1 * V(err_in0) - k2 * V(err_prev1[0]) + k3 * V(err_prev2[0]), trise, tfall) ;
 
            @ (cross( V(clk) - vtrans, +1, 1.0, clk.potential.abstol) ) begin
                for(i = 5; i > 0; i = i-1) begin
                    if ( V(reset) == 1) begin
                        V(comp_prev[i]) <+ 0;
                        V(err_prev1[i]) <+ 0;
                        V(err_prev2[i]) <+ 0;
                    end
                    else 
                        V(err_prev2[i]) <+ V(err_prev1[i]);                     
                        V(err_prev1[i]) <+ V(comp_prev[i]);
 
                        V(comp_prev[5]) <+ V(comp_out5);
                        V(comp_prev[4]) <+ V(comp_out4);
                        V(comp_prev[3]) <+ V(comp_out3);
                        V(comp_prev[2]) <+ V(comp_out2);
                        V(comp_prev[1]) <+ V(comp_out1);
                        V(comp_prev[0]) <+ V(comp_out0);
                end
            end 
end
 
endmodule

Error

Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.
Zero diagonal found in Jacobian at `I3.err_prev2[5]' and `I3.err_prev2[5]'.

Error found by spectre at time = 16 ns during transient analysis `tran'.
ERROR (SPECTRE-16192): No convergence achieved with the minimum time step specified.

The following set of suggestions might help you avoid convergence difficulties.

1. Evaluate and resolve any notice, warning, or error messages.
2. Use realistic device models. Check all component parameters, particularly nonlinear device model parameters, to ensure that they are reasonable.
3. Small floating resistors connected to high impedance nodes can cause convergence difficulties. Avoid very small floating resistors, particularly small parasitic resistors in semiconductors. Instead, use voltage sources or iprobes to measure current.
4. Ensure that a complete set of parasitic capacitors is used on nonlinear devices to avoid jumps in the solution waveforms. On MOS models, specify nonzero source and drain areas.
5. Perform sanity check on the parameter values by using the parameter range checker (use ``+param param-limits-file'' as a command line argument) and heed any warnings. Print the minimum and maximum parameter value by using `info' analysis. Ensure that the bounds given for instance, model, output, temperature-dependent, and operating-point (if possible) parameters are reasonable.

6. Check the direction of both independent and dependent current sources. Convergence problems might result if current sources are connected such that they force current backward through diodes.

7. Enable diagnostic messages by setting option `diagnose=detailed'.
8. Use the `cmin' parameter to install a small capacitor from every node in the circuit to ground. This usually eliminates any jump in the solution.
9. Loosen tolerances, particularly absolute tolerances like `iabstol' (on options statement). If tolerances are set too tight, they might preclude convergence.

10. If your circuit contains AHDL elements that are not dynamic (have no energy storage), convergence difficulties might arise.
11. Try to simplify the nonlinear component models to avoid regions that might contribute to convergence problems in the model.

Analysis `tran' was terminated prematurely due to an error.
finalTimeOP: writing operating point information to rawfile.

Error found by spectre during DC solution estimation, during DC analysis, during info `finalTimeOP'.
ERROR (SPECTRE-11005): Matrix is singular (detected at `I3.err_prev2[5]').

dick_freebird · Aug 17, 2017

Try putting trivial series resistors between the veriloga
widget's symbol pins and the wiring. Like 10mOhm. Or
voltage sources like it suggests in the error-barf. It
can force a better evaluation of the veriloga for some
reason that I don't understand, but have observed.

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[moved] Verilog A zero diagonal found in jacobian error

npsnpsnps

Junior Member level 1

dick_freebird

Advanced Member level 7

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