nkp6195
Newbie level 4
Dear All,
Recently, we encountered an issue in one of our chips where someone accidentally connected a psub guard ring to VDD instead of GND. Post chip tapeout we noticed heavy leakage current whenever input voltage was given to the pad in which the guard ring was connected with the opposite polarity. Schematic wise the pad works just fine. I am wondering if a post-layout sim (using calibre or hspice) can reveal this unintended diode and the associated heavy leakage current ? Otherwise we have no way of catching these errors. Note that the chip was DRC/LVS clean.
Thanks in anticipation.
Recently, we encountered an issue in one of our chips where someone accidentally connected a psub guard ring to VDD instead of GND. Post chip tapeout we noticed heavy leakage current whenever input voltage was given to the pad in which the guard ring was connected with the opposite polarity. Schematic wise the pad works just fine. I am wondering if a post-layout sim (using calibre or hspice) can reveal this unintended diode and the associated heavy leakage current ? Otherwise we have no way of catching these errors. Note that the chip was DRC/LVS clean.
Thanks in anticipation.