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  1. #1
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    Writing fresh data to a file after re-launch of sim in Vivado2017.2 + VHDL

    In my test-bench I repeteadly call a procedure (while loop used). In this procedure a file is opened (if not already open) else it is opened in append mode. The logic in the procedure writes data to this file. For 1 complete simulation run, I gather all data, this works fine, I have no problems.
    The problem occurs when I re-launch the simulation. In this case too data gets appended to the file after the old data. Note that I don't close this file anywhere.

    But my wish is to remove all previous logged data from the file and write fresh data from the start of the file, whenever a new simulation is launched. How to achieve this?

    Till now I am following the manual way of 'close simulation'(else Vivado keeps the file locked) and deleting the file from the dir, then running a fresh simulation.

    Code:
    rx_tx : process
    
        -- other procedures
        
        procedure data_rx_ddf is       
            -- Write to file variables    
            variable outline       : line ;  -- line number declaration
            file     outfile       : text ;  -- Declare write file variable, file pointer
            variable fstatus       : FILE_OPEN_STATUS;     
            
        begin
    
            report "Got status from file: '" & FILE_OPEN_STATUS'image(fstatus) & "'"; -- Always reports with 'open_ok'
            
            -- Open/Append file for writing
            if  fstatus /= OPEN_OK then -- Seems like file is always open if it is not closed(?)  
                file_open(fstatus, outfile, "C:\Work\fpga_a7\sources\sim\dump_data_results.txt", write_mode);
            else
                file_open(fstatus, outfile, "C:\Work\fpga_a7\sources\sim\dump_data_results.txt", append_mode);
            end if;            
            .
            .
            -- Remaining part where write-to-file operations are done based on some logic
    
            -- file_close() is never called        
    
        end data_rx_ddf;    
    
    begin
        procedure0;    
        wait for 10 ns;    
        procedure1;    
    
            if error = '0' then -- signal
    
                procedure3;            
                wait for 10 ns; 
                
                start <= '1';   -- signal
                
                wait for 1 us;       
             
                -- Check data repeteadly
                while (start='1') loop
                    data_rx_ddf;                          -- procedure of interest
                    -- Reset signals 
                    lf_byte_cnt       <= (others => '0');
                    lf_total_byte_cnt <= (others =>'0');
                    lf_num            <= (others => '0'); 
                    jf_rx_mtu         <= (others => '0'); 
                end loop;            
                
                wait;
            else
                wait; -- Do nothing in case of errors
            end if;
    end process rx_tx;
    .....yes, I do this for fun!

    •   Alt15th August 2017, 11:50

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  2. #2
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    Re: Writing fresh data to a file after re-launch of sim in Vivado2017.2 + VHDL

    Does vivado have a way of distinguishing between re-launch and starting a simulation a fresh?

    Your append is working the way you want which is preventing you working the way you also want?



    •   Alt15th August 2017, 12:12

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  3. #3
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    Re: Writing fresh data to a file after re-launch of sim in Vivado2017.2 + VHDL

    Does vivado have a way of distinguishing between re-launch and starting a simulation a fresh?
    The Vivado cmds are close_sim, launch_simulation and relaunch_sim.
    If I call relaunch_sim repeatedly (reason is not important), Vivado 2017.2 keeps the file open always and appends data to it.
    Whereas if I do close_sim, then Viv releases control of the file and I can delete/move it. Then I have run launch_simulation to run my test bench and log fresh data.

    relaunch_sim takes less time compared to close_sim + launch_simulation

    Your append is working the way you want which is preventing you working the way you also want?
    You misunderstood me. Every time I run then relaunch_sim I want my old data from the file removed (or have a completely new file).
    I don't want to perform close_sim + manually delete file + launch_simulation as it takes more time.
    .....yes, I do this for fun!



    •   Alt15th August 2017, 12:39

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    Re: Writing fresh data to a file after re-launch of sim in Vivado2017.2 + VHDL

    File handling is something that isnt defined in VHDL, and is handed to the simulation tool.
    To do what you're doing, why not explicitly open the file in write mode at the start of the simulation? That would wipe it always.


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    Re: Writing fresh data to a file after re-launch of sim in Vivado2017.2 + VHDL

    Thanks for the trick Tricky! It serves my purpose.



    •   Alt15th August 2017, 14:13

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  6. #6
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    Re: Writing fresh data to a file after re-launch of sim in Vivado2017.2 + VHDL

    Along with Tricky's suggestion, opening the file repeatedly in the procedure wasn't very good for simulation performance as file operations for open/close files is not necessarily fast (well maybe if you are using an SSD, it's not horrendously slow). It's better to have separate procedures to open the file, run the simulation writing to the file, and finally when the simulation has completed close the file.



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