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  1. #1
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    how to fix WARNING:Xst:1710

    hello
    I'm trying to simulate a simple ROM(read only memory) in ISE 14.7 but unfortunately I have a warning during synthesize xst.

    WARNING:Xst:1710 - FF/Latch <data_out1_5> (without init value) has a constant value of 0 in block <ROM>. This FF/Latch will be trimmed during the optimization process.

    I've seen a description in this link:
    https://www.xilinx.com/support/answers/31856.html

    but I use spartan6.

    I guess what the problem is but how can I fix this?(before reset all registers values are undefined but after reset all of them set to zero and after that when I want to set a register with a zero value I have the mentioned warning.

    this is my code:

    Code Verilog - [expand]
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    module ROM( 
    clk, 
    read_en,
    reset, 
    address, 
    data_out0, 
    data_out1, 
    data_out2, 
    data_out3, 
    data_out4, 
    data_out5
    );
     
     
    input read_en, clk, reset;
    input [5:0] address;
     
    output reg [5:0] data_out0 ;
    output reg [5:0] data_out1 ;
    output reg [1:0] data_out2 ;
    output reg [5:0] data_out3 ;
    output reg [5:0] data_out4 ;
    output reg [1:0] data_out5 ;
           
    always @ ( posedge clk or posedge reset)
     begin
      if ( reset )
       begin
         data_out0 <= 6'b000000 ;
         data_out1 <= 6'b000000 ;
         data_out2 <= 2'b00 ;
         data_out3 <= 6'b000000 ;
         data_out4 <= 6'b000000 ;
         data_out5 <= 2'b00 ;
       end
      else
       begin
         if (read_en)
          begin
           case (address)
               
             6'b000000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0000000000000000000010000011; //0
                
               6'b000001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0000010000001100000110000000; //1
                
             6'b000010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0000100000011000001010000101; //2
                
             6'b000011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0000110000010100001110000110; //3
                
             6'b000100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0001000000100000010010001011; //4
                
             6'b000101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0001010000101100010110001000; //5
                
             6'b000110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0001100000111000011010001101; //6
                
             6'b000111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0001110000110100011110001110; //7
                
             6'b001000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0010000001001100100010010000; //8
                
             6'b001001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0010010001000000100110010011; //9
                
             6'b001010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0010100001010100101010010110; //10
                
             6'b001011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0010110001011000101110010101; //11
                
             6'b001100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0011000001101100110010011000; //12
                
             6'b001101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0011010001100000110110011011; //13
                
             6'b001110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0011100001110100111010011110; //14
                
             6'b001111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0011110001111000111110011101; //15
                
             6'b010000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0100000010001101000010100000; //16
                
             6'b010001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0100010010000001000110100011; //17
                
             6'b010010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0100100010010101001010100110; //18
                
             6'b010011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0100110010011001001110100101; //19
                
             6'b010100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0101000010101101010010101000; //20
                
             6'b010101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0101010010100001010110101011; //21
                
             6'b010110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0101100010110101011010101110; //22
                
             6'b010111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0101110010111001011110101101; //23
                
             6'b011000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0110000011000001100010110011; //24
                
             6'b011001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0110010011001101100110110000; //25
                
             6'b011010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0110100011011001101010110101; //26
                
             6'b011011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0110110011010101101110110110; //27
                
             6'b011100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0111000011100001110010111011; //28
                
             6'b011101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0111010011101101110110111000; //29
                
             6'b011110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0111100011111001111010111101; //30
                
             6'b011111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b0111110011110101111110111110; //31
                
             6'b100000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1000000100000110000011000010; //32
                
             6'b100001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1000010100001010000111000001; //33
                
             6'b100010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1000100100011110001011000100; //34
                
             6'b100011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1000110100010010001111000111; //35
                
             6'b100100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1001000100100110010011001010; //36
                
             6'b100101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1001010100101010010111001001; //37
                
             6'b100110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1001100100111110011011001100; //38
                
             6'b100111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1001110100110010011111001111; //39
                
             6'b101000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1010000101001010100011010001; //40
                
             6'b101001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1010010101000110100111010010; //41
                
             6'b101010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1010100101010010101011010111; //42
                
             6'b101011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1010110101011110101111010100; //43
                
             6'b101100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1011000101101010110011011001; //44
                
             6'b101101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1011010101100110110111011010; //45
                
             6'b101110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1011100101110010111011011111; //46
                
             6'b101111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1011110101111110111111011100; //47
                
             6'b110000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1100000110001011000011100001; //48
                
             6'b110001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1100010110000111000111100010; //49
                
             6'b110010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1100100110010011001011100111; //50
                
             6'b110011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1100110110011111001111100100; //51
                
             6'b110100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1101000110101011010011101001; //52
                
             6'b110101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1101010110100111010111101010; //53
                
             6'b110110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1101100110110011011011101111; //54
                
             6'b110111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1101110110111111011111101100; //55
                
             6'b111000 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1110000111000111100011110010; //56
                
             6'b111001 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1110010111001011100111110001; //57
                
             6'b111010 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1110100111011111101011110100; //58
                
             6'b111011 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1110110111010011101111110111; //59
                
             6'b111100 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1111000111100111110011111010; //60
                
             6'b111101 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1111010111101011110111111001; //61
                
             6'b111110 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1111100111111111111011111100; //62
                
             6'b111111 : { data_out0, data_out1, data_out2, data_out3, data_out4, data_out5 } <= 28'b1111110111110011111111111111; //63
           endcase
          end
       end
        
     end
     
    endmodule
    Last edited by bassa; 12th August 2017 at 08:20. Reason: add code tag

    •   Alt12th August 2017, 08:07

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  2. #2
    Advanced Member level 3
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    Re: how to fix WARNING:Xst:1710

    It is a warning. Determine if it is ok (it probably is) and then ignore it.

    EDA tools often present optimizations as warnings. If you come from a SW background this will seem weird. Large designs have many warnings as a result.

    In this case, bit index 5 of data_out1 just happens to be 0 for all 64 values in the ROM as well as the reset.

    You can "fix" the warning by adding logic that breaks this optimization and sets this bit to 1 in a case that cannot occur in practice. This is not a good choice though. Basically, unlike SW, you should not attempt to get 0 warnings for HW designs.


    1 members found this post helpful.

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