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Power Grid Dimensioning in SOCs Guidelines/Methodology

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DimitrisStathis

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Hello all,

Can anyone help me understand better how to dimension the power lines in an SOC design when doing the power planning in e.g. CADENCE Innovus?
What I would like to know is if there is a methodology or a guideline that I can use to calculate for example the width of the ring wires on the SOC, the number of stripes, position and number of power pins, etc. (depending of course on the technology and the size of the SOC).

If you have any good reading to propose, like a white paper or any other Document, that would be nice :)
Any information that you can provide would be extremely helpful!

Best Regards,
Dimitrios
 

You need to understand lots of issues and balance them all at the same time. EM and IRdrop to start with. The power ring/mesh structures. Lower mesh vs upper mesh.

The requirements are very different from technology to technology, so make sure to read the guidelines from the foundry.

There is no one size fits all solution.

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This link covers the very basics: **broken link removed**
 
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