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50 Ohm inmpedance matching for 4 layers PCB

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bremenpl

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Hello there,
I have a question regarding calculating track width and gaps on the side for 4 layer PCB board, in order to maintain 50 ohm impedance for it. The term I have come across for calling this is "Coplanar waveguide". My problem is, that I need to calculate the widths for 4 layer PCB board, and every source i refer to offers calculation for a single trace with only one power plane underneath. For example AppCAD:

appcad.png

In my application, where I want to make a PCB for a GSM module, the producer provided some examples of PCB stacks, for both 2 and 4 layer PCB:

gsm.jpg

From this i understand that calculation for 2 and 4 layer board differs, but there is no explanation in the datasheet.
How can I calculate the Coplanar waveguide for a 4 layer PCB (Assuming both planes are GND)? I would really appreciate all help.
 

I don't understand the problem. In both cases the transmission line is formed by the structure between the PCB top and the adjacent ground plane. Everything below the first ground plane doesn't matter because it's shielded from the electromagnetic field.
 

Thank you for answer,
That is something I was exacly wondering about, and even thought of it. I started doubting it, because the impedance I obtained from AppCad differed a lot from 50R when used parameters from the datasheet.
 

Just be sure that you drop many vias from the ground side of th CPW to the layer below as you can. You need to keep both as close to ground potential as you can. With poor grounding, your board will probably not work as well as you need.
 

I was planning to use both internal planes for GND and use stitching on whole board with additional vias around the antenna NET.
 

I started doubting it, because the impedance I obtained from AppCad differed a lot from 50R when used parameters from the datasheet.

I also get slightly different impedances for both stackups, 55 to 58 ohms depending on the Er value. But apart from this difference, the results are consistent.
 

Normally, the impedance simulation depends on Er and impedance model. I always consider Er is a variable, after lamination, the Er definately will be different than the orginal value. if we want to get more accurate simuation result, we have to think about how to make the Er more precise duiring the calcualtion.
I attach one ppt to introduce our solution of the impedance simulation, if you are interesting, we can deeply discuss it.
 

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  • Cost-effective PCB Impedance & Insertion Loss Simulation for a Specific Stackup.pdf
    1.9 MB · Views: 143

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