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  1. #1
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    Same constant name in 2 different packages

    Hello,

    This is somewhat a followup to this post
    http://www.edaboard.com/showthread.php?t=369737
    Unfortunately, I tried the proposed solution in post #9 and it didn't work.

    So I'll try again

    "some_package_1" contains a constant named : "some_constant"
    Code:
    library ieee ;
    	use ieee.std_logic_1164.all ;
    	use ieee.numeric_std.all ;
    
    package body some_package_1 is
    
    constant some_constant : std_logic := '0' ;
    
    end package body some_package_1 ;
    "some_package_2" contains a constant with the same name but a different value.
    Code:
    library ieee ;
    	use ieee.std_logic_1164.all ;
    	use ieee.numeric_std.all ;
    
    package body some_package_2 is
    
    constant some_constant : std_logic := '1' ;
    
    end package body some_package_2 ;
    In my code, I'd like to compare "some_constant" from some_package_1 to "some_constant" from some_package_2.

    Code:
    library ieee ;
    use ieee.std_logic_1164.all ;
    use ieee.numeric_std.all ;
    
    library work ;
    use work.some_package_1.all ;	
    use work.some_package_2.all ;
    .
    .
    .
    signal some_signal : std_logic ;
    
    begin
    
    	some_signal <= some_constant(from some_package_1) and some_constant(from some_package_2) ; -- How should I rewrite this line to make it work?
    	
    end architecture ;

  2. #2
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    Re: Same constant name in 2 different packages

    it didn't work
    Means syntax error flagged, wrong item selected,...?

    Did you try the regular syntax for expanded names, e.g. work.some_package_1.some_constant ?



    •   Alt5th August 2017, 13:22

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  3. #3
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    Re: Same constant name in 2 different packages

    Did you try the regular syntax for expanded names, e.g. work.some_package_1.some_constant ?
    Yes.

    This is the exact line:
    Code:
    some_signal <= work.some_package_1.some_constant and work.some_package_2.some_constant ;
    Modelsim error message:
    Unknown resolved name



    •   Alt5th August 2017, 17:00

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  4. #4
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    Re: Same constant name in 2 different packages

    I don't get any errors when compiling a similar example.

    The package definitions in post #1 are incomplete (package body without package declaration).



  5. #5
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    Re: Same constant name in 2 different packages

    The package definitions in post #1 are incomplete (package body without package declaration).
    OK.
    I changed it - it doesn't work..some_package_2.txtsome_entity.txtsome_package_1.txt.
    Please change the *.txt to *.vhd and compile... does it work ?



    •   Alt5th August 2017, 19:42

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  6. #6
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    Re: Same constant name in 2 different packages

    This should work: just use full qualified names and do not import "all":

    Quote Originally Posted by shaiko View Post
    Code:
    library ieee ;
    use ieee.std_logic_1164.all ;
    use ieee.numeric_std.all ;
    
    library work ;
    -- use work.some_package_1.all ;      remove this	
    -- use work.some_package_2.all ;      and this
    .
    .
    .
    
    	some_signal <= work.some_package_1.some_constant and work.some_package_2.some_constant ; -- change here



  7. #7
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    Re: Same constant name in 2 different packages

    This is my last code:

    Code:
    library ieee ;
    use ieee.std_logic_1164.all ;
    use ieee.numeric_std.all ;
     
    library work ;
    --use work.some_package_1.all ;	
    --use work.some_package_2.all ;		
    
    entity some_entity is
    end entity some_entity ;
    
    architecture rtl_some_entity of some_entity is 
    
    signal some_signal : std_logic ;
    
    begin 
    
    	some_signal <= work.some_package_1.some_constant and work.some_package_2.some_constant ;
    
    end architecture ;
    As suggested these have been commented away
    --use work.some_package_1.all ;
    --use work.some_package_2.all ;
    Compilation fails.



  8. #8
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    Re: Same constant name in 2 different packages

    Quote Originally Posted by shaiko View Post
    Compilation fails.
    Post the error message.



  9. #9
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    Re: Same constant name in 2 different packages

    I found the bug.
    This code compiles now without errors (even with the ".all" in place).

    Code:
    library ieee ;
    use ieee.std_logic_1164.all ;
    use ieee.numeric_std.all ;
     
    library work ;
    	use work.some_package_1.all ;	    
    	use work.some_package_2.all ;	    
    
    entity some_entity is
    end entity some_entity ;
    
    architecture rtl_some_entity of some_entity is 
    
    signal some_signal : std_logic ;
    
    begin 
    
    	some_signal <= work.some_package_1.some_constant and work.some_package_2.some_constant ;
    
    end architecture ;
    The problem was in the packages.
    I declared the constants in the package body instead of in the package head.

    I.E, I changed this:
    Code:
    library ieee ;
    use ieee.std_logic_1164.all ;
    
    package some_package_1 is
    end package some_package_1 ;
    
    package body some_package_1 is
    constant some_constant : std_logic := '0' ;
    end package body some_package_1 ;
    To this:
    Code:
    package some_package_1 is
    constant some_constant : std_logic := '0' ;
    end package some_package_1 ;
    
    package body some_package_1 is
    end package body some_package_1 ;
    Did the same change for "some_package_2" and now it compiles.



  10. #10
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    Re: Same constant name in 2 different packages

    The constants are not exported because they are not contained in the declaration. A package body isn't needed at all for constant definition. Try this way

    Code VHDL - [expand]
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    library ieee ;
    use ieee.std_logic_1164.all ;
    use ieee.numeric_std.all ;
     
    package some_package_1 is
      constant some_constant : std_logic := '0' ;
    end package some_package_1 ;



    •   Alt6th August 2017, 11:48

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  11. #11
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    Re: Same constant name in 2 different packages

    This is exactly what I wrote in #9



  12. #12
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    Re: Same constant name in 2 different packages

    Quote Originally Posted by shaiko View Post
    This is exactly what I wrote in #9
    But FvM was pointing out that you kept the package body, which is now empty - this is not required.
    Overall this is a scoping problem, and again, as pointed out, only things in the package declaration are visible externally. Declaring new items in the body are only visible in the body, and dont need a corresponding declaration in package declaration region.

    Another thing that has always been possible in packages is deferred constants. This way you can declare the constant without a value in the package declaration, and then assgn the value in the body. This could allow you to have multiple values for constants by have multiple bodies in different files, and only compiling the one needed in the given project.

    Code VHDL - [expand]
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    package impl_pkg is 
      constant SOME_NUMBER : integer;
    end package;
     
    --in file 1
    package body impl_pkg is
      constant SOME_NUMBER : integer := 10;
    end package body;
     
    --file 2
    package body impl_pkg is
     constant SOME_NUMBER : integer := 88;
    end package body;

    - - - Updated - - -

    This has become somewhat redundant in VHDL 2008 with the inclusion of package generics (and in VHDL 2017 generics specifically on protected types too :) )



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