+ Post New Thread
Results 1 to 5 of 5
  1. #1
    Newbie level 5
    Points: 89, Level: 1

    Join Date
    Jul 2017
    Posts
    9
    Helped
    0 / 0
    Points
    89
    Level
    1

    Amp ADC interfacing using VHDL for Spartan-3A

    Hello!

    I am relatively new to VHDL. I have tried some smaller tasks and have been successful. I have been working interfacing amp and ADC of a Spartan-3A starter kit for my project. I have been working on it for months and haven't been able to make any progress. I got a reference code from http://www.edaboard.com/thread213091.html

    But I am not able to understand some things:
    Why are we checking bit 12? --- if(amplitude1_buffer(12) = '1') then

    What does this command mean? -- SPI_MOSI <= gain2(3 - cnt);

    Why does mclk do? And what is the trigger used for?

    Also, if anyone has a UCF file and if you've written a code for this, can you please please please send it to me?
    I really need a reference.


    I am really looking forward to your help.

    Thanks and regards,
    NJ176

    •   Alt31st July 2017, 09:44

      advertising

        
       

  2. #2
    Super Moderator
    Points: 52,956, Level: 56
    Achievements:
    7 years registered
    Awards:
    Most Frequent Poster

    Join Date
    Apr 2014
    Posts
    10,660
    Helped
    2526 / 2526
    Points
    52,956
    Level
    56

    Re: Amp ADC interfacing using VHDL for Spartan-3A

    Hi
    I don't want to read the whole foreign thread...
    I assume bit 12 is the MSN and therefore the sign bit..
    According trigger and MCLK: it is urgent for you to read the ADC datasheet.

    Klaus



    •   Alt31st July 2017, 10:26

      advertising

        
       

  3. #3
    Super Moderator
    Points: 27,814, Level: 40
    ads-ee's Avatar
    Join Date
    Sep 2013
    Location
    USA
    Posts
    6,354
    Helped
    1539 / 1539
    Points
    27,814
    Level
    40

    Re: Amp ADC interfacing using VHDL for Spartan-3A

    Quote Originally Posted by NJ176 View Post
    What does this command mean? -- SPI_MOSI <= gain2(3 - cnt);
    Because the code writer is clueless about how to write a proper shift register.

    As cnt increments 0, 1, 2, 3 you select gain2(x) where x is 3, 2, 1, 0. Later it uses gain2(7-cnt) for 7, 6, 5, 4.

    Shows the coder doesn't know what a shift register is.

    Looks like the ADC must have a SPI interface. I'd go find a better SPI implementation than this code.


    1 members found this post helpful.

    •   Alt31st July 2017, 17:24

      advertising

        
       

  4. #4
    Newbie level 5
    Points: 89, Level: 1

    Join Date
    Jul 2017
    Posts
    9
    Helped
    0 / 0
    Points
    89
    Level
    1

    Re: Amp ADC interfacing using VHDL for Spartan-3A

    Thank you so much for all your replies, especially ads-ee.

    Could you please help me figure what does mclk do? Because I have checked the data sheet and I am still not able to figure it out. The data sheet only mentions the use of one clock. And mclk is an input, so where would this input come from?

    Thank you so much for your replies in advance.



  5. #5
    Super Moderator
    Points: 27,814, Level: 40
    ads-ee's Avatar
    Join Date
    Sep 2013
    Location
    USA
    Posts
    6,354
    Helped
    1539 / 1539
    Points
    27,814
    Level
    40

    Re: Amp ADC interfacing using VHDL for Spartan-3A

    mclk is a higher frequency clock used to generate the divided down timing of the SPI. As I've stated before you should probably find a better representation of SPI code as this version was likely written by someone with a software background as it uses more of a software approach to the design. Anyone familiar with a hardware implementation of SPI would use shift registers and would avoid using variables for counters as that results in the addition with 1 occurring after the FFs.

    I'm pretty sure this design synthesizes to something quite a bit bigger than a more optimal implementation, specifically due to the multiplexing done to replicate the much simpler shifting.


    1 members found this post helpful.

--[[ ]]--