Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Delay Cell Design in Differential Ring Oscillator

Status
Not open for further replies.
N

niteshtripathi

Member level 3
Joined
Oct 11, 2013
Messages
59
Helped
0
Reputation
0
Reaction score
0
Trophy points
6
Activity points
429
Hi all,

In fully differential ring oscillator , I ma using the delay cell as shown in attached image.

In this the top two mosfets will be in the triode region so that by varying the vcontrol we can vary the resistance. The MOS at the bottom, which is acting as constant current source should be in saturation across PVT.

What's about the differential input pair mosfets? It should be saturation across the PVT or what?

Hoping for any lead?

IMG_20170727_101553.jpg
 

I don't think it matters a lot whether the devices
are in, or straddling, particular region(s). Of course
the diff pair devices will be toggling between "off"
and either linear or saturation (-ish).

Curious why you'd choose to vary the load and not
simultaneously the tail source. You could run into
more corners trouble if these are let wander
independently. I'd be setting Itail to be Iload*2
at the bias reference.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top