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how to use generate&for to do "x = x + a(i)"

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bravoegg

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A*x = b, in which A is matrix, x and b are column vectors. Each element in A or x or b are all 1-bit width.
The * and + are all mod 2!!

A is like
Code:
1 1 0 0 0 0 ... 1 0 
1 0 0 0 0 0 ... 0 0
.
.
.
1 1 1 1 0 0 ... 1 1

so Ax=b could be:
b(1) = x(1) + x(2) + ... + x(n-2) // "+" is mod(2)
b(2) = x(1) + ... + ...
...
b(n-1)= x(1) + x(2) + ... + x(n-2) + x(n-1)


Actually the matrix A I'm working with is much bigger, A is of 192*192. Though it's big, in each row there's at most 12 1s and the left are all 0s.
it's very cumbersome to manually type the code. I try to use generate&for. But getting stucked.
Code:
for(i=0;i<192;i=i+1)
   for(j=0;j<192;j=j+1)    
       b(i) = b(i) + A(i,j) * x(j);

1. the above two for loop is not synthesizable, how could it be modified?
2. matrix A is predetermined and does not change. Lots of A(i,j) are 0s and these A(i,j) * x(j) are constantly 0. Can I trust that the Vivado will automatically synthesize these terms?

////////////////////////////////////////////////////////
There're two problems with the above Ax=b arithmetic. One is that vertically, take x(1) for example, x(1) is driving a LOT of elements, a high fanout is detrimental; Two is that horizontally, take b(n-1) for example, b(n-1) is composed of many levels of addition, thus causing long critical path. But these two are irrelevant to my questions.
 

You leave us wondering what this is for?
Is it for an FPGA?
What langauge do you want it in?
Where is the code you already tried?
Did you draw a diagram of the circuit you expect?
 

Code:
for(i=0;i<192;i=i+1)
   for(j=0;j<192;j=j+1)    
       b(i) = b(i) + A(i,j) * x(j);
If this is your actual code...are you trying to mix Verilog and VHDL syntax?
Better post the exact code you are trying to synthesize, instead of pseudo code.
 

1. it is for FPGA
2. verilog
4. the diagram is simple, but requires lots of typing which I'm trying to avoid
3. I want to avoid typing the following code:
b(0) = A(0,0) * x(0) + A(0,1) * x(1) + ... + A(n-1,n-1) * x(n-1);
b(1) = A(1,0) * x(0) + A(1,1) * x(1) + ... + A(1 ,n-1) * x(n-1);
...
b(k) = A(k,0) * x(0) + A(k,1) * x(1) + ... + A(k ,n-1) * x(n-1);

I realize that for-loop only applies when instantiating the same x(0) + x(1) + ... + x(n-1)
for(i=0;i<192;i=i+1)begin b(i) = x(0) + x(1) + .... x(n-1); end

but my problem here is that A(m,n) is varying for each x(n). I don't know how to code for this case.:cry:
 

You still did not supply the actual code you are synthesizing, why not?

General information (as you didn't supply the actual code, but instead showed us more pseudo code)
() is not verilog indexing
[] is the verilog indexing

You can index using A[j] (for a 3D array) or A[J_MAX_INDEX*i+j] (for a 2D array, useful if the data is in a RAM)
 

generate
for(i=0;i<192;i=i+1)
b = A[0] * x[0] + A[1]*x[1] + .... + A[191]*x[191];
endgenerate

I think this is the best I could do...at least 192 items should be typed. The one-line matlab-like b(i) = b(i) + A(m,n)*x(n) is beyond my skills.
 

Obviously you didn't even read my posts...your loss.
 

This is all done in GF2, so you can use the vector logic operators.

Code:
generate
  for (i = 0; i < 192; i = i + 1) begin
    outArray[i] = ^(matrixRowArray[i] & inArray);
  end
endgenerate

The & will do the bitwise "and" -- which is multiply in this problem. The ^ in front is the xor-reduction (aka parity) operator which will perform the logical xor -- addition for this problem -- to create the final sum.
 

Thank you. I followed your advice and it works. It's better to use ^ and & than "*" "+" in Gf(2).
the code I firstly post is wrong:
Code:
b[i] = A[i][0] * x[0] + A[i][1]*x[1] + .... + A[i][191]*x[191];

I assumed that, since A is a fixed matrix of elements of either 0 or 1, even though I explicitly typed "*" in the code, the Vivado tool would "know" to synthesize the 0s, and use LUTs instead of multipliers.
However, the synthesize report shows all of the DSP multipliers are used up...
 

Unless both A and X are both constants, there is no way it will know what they are during runtime. Hence the use of DSPs (though DSP use for 1 bit multiplies seems a bit excessive).
 

Unless both A and X are both constants, there is no way it will know what they are during runtime. Hence the use of DSPs (though DSP use for 1 bit multiplies seems a bit excessive).

The problem is they are supposed to be using Galois Field math (GF(2)) and not * +. I ignored that in my original reply as they stated they didn't care about the math but wanted a solution for their pseudo code of the double for loops.
There're two problems with the above Ax=b arithmetic. One is that vertically, take x(1) for example, x(1) is driving a LOT of elements, a high fanout is detrimental; Two is that horizontally, take b(n-1) for example, b(n-1) is composed of many levels of addition, thus causing long critical path. But these two are irrelevant to my questions.
I explained what was wrong with their indexing, but they ignored my posts, which would have saved them from typing in 192 terms of their solution.
 

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