majd229
Member level 2
Anyone thats familiar with Synopsys IC Compiler II and .LEF design format, help me!
Hello,
I'm an engineering intern at a semiconductor company. I was told to figure out a way to use ICC2 to build a verilog interface pinout file (called a verilog stub, vshell, or interface file I believe) that has the pinout information of the design in verilog format, using the .LEF file as an input.
I was given no guidance at all, and was told that "You owe yourself to do research". All I have is the help/user manual of ICC2 and no idea of anything other than that. I managed to read_lef using ICC2 to load the LEF into it, but how do I go about building a verilog pinout stub/vshell/interface file?
I'm internally panicking, any help is appreciated. Thank you
Hello,
I'm an engineering intern at a semiconductor company. I was told to figure out a way to use ICC2 to build a verilog interface pinout file (called a verilog stub, vshell, or interface file I believe) that has the pinout information of the design in verilog format, using the .LEF file as an input.
I was given no guidance at all, and was told that "You owe yourself to do research". All I have is the help/user manual of ICC2 and no idea of anything other than that. I managed to read_lef using ICC2 to load the LEF into it, but how do I go about building a verilog pinout stub/vshell/interface file?
I'm internally panicking, any help is appreciated. Thank you