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Question about post cts encounter negative insertion delay

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brunope

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Question about post cts encounter negative insertion dealy

Hi all,

I have been doing some ASIC back end flow for some time now, but I am discovering Cadence tools...

I am facing at the moment something that I don't understand with Encounter.

In post cts stages, in the report timings in reg2reg, I see a negative insertion delay for my launch point.

Please see the example below:

I run:
Code:
report_timing -from */*/Q* -to */*/D -path_type full_clock -max_paths 1

I get the following:

Endpoint: gen_ctrl_slices[29].ctrl_slice_x/start_del_reg_D_reg/D (v) checked
with leading edge of 'clk_CI'
Beginpoint: start_sync/sync_chain_reg[1]/Q (v)
triggered by leading edge of 'clk_CI'
Analysis View: slow_func
Other End Arrival Time 1.758
- Setup 0.499
+ Phase Shift 2.500
+ CPPR Adjustment 0.000
= Required Time 3.758
- Arrival Time 2.690
= Slack Time 1.068
Clock Rise Edge 0.000
+ Source Insertion Delay -1.950
= Beginpoint Arrival Time -1.950


There are aspects about this:
-I don't understand where this -1.950 ns comes from. I would rather expect a positive value.

-It makes my timing massively wrong
since the capture starts at 0ns (giving 1.950ns extra time for the path).

See below the details of

In STA, I see both launch and capture starting at 0 (as I would expect), with the same set of constraints.
And of course, STA reports me violations since PnR constraints where too relaxed by 1.950ns.

Please find below the details of the full_clock timing report(even though I think the problem is more in "where is this -1950ns for the start point coming from).

Thanks all for your help !

encounter 4> report_timing -from */*/Q -to */*/D -path_type full_clock -max_paths 1
###############################################################
# Generated by: Cadence Encounter 14.28-s033_1
# OS: Linux x86_64(Host ID cyclops.ti.bfh.ch)
# Generated on: Tue Jul 18 10:10:11 2017
# Design: ctrl_top_256
# Command: report_timing -from */*/Q -to */*/D -path_type full_clock -max_paths 1
###############################################################
INFO: The software has a found an intermediate begin point 'max_cnt_AI[4]' between the specified -from and -to points to the report_timing command. To report paths between these points accurately, you should use the report_timing -view option to analyze one view at a time
Path 1: MET Setup Check with Pin gen_ctrl_slices[29].ctrl_slice_x/start_del_reg_
D_reg/CP
Endpoint: gen_ctrl_slices[29].ctrl_slice_x/start_del_reg_D_reg/D (v) checked
with leading edge of 'clk_CI'
Beginpoint: start_sync/sync_chain_reg[1]/Q (v)
triggered by leading edge of 'clk_CI'
Analysis View: slow_func
Other End Arrival Time 1.758
- Setup 0.499
+ Phase Shift 2.500
+ CPPR Adjustment 0.000
= Required Time 3.758
- Arrival Time 2.690
= Slack Time 1.068
Clock Rise Edge 0.000
+ Source Insertion Delay -1.950
= Beginpoint Arrival Time -1.950
Timing Path:
+--------------------------------------------------------------------------------------------------------+
| Instance | Arc | Cell | Delay | Arrival | Required |
| | | | | Time | Time |
|----------------------------------------------------+-------------+--------+-------+---------+----------|
| | clk_CI ^ | | | -1.950 | -0.881 |
| AZ_ccl_BUF_clk_CI_G0_L1_1 | I ^ -> Z ^ | bufbdf | 0.322 | -1.628 | -0.560 |
| AZ_ccl_BUF_clk_CI_G0_L2_1 | I ^ -> Z ^ | buffda | 0.372 | -1.256 | -0.187 |
| AZ_ccl_BUF_clk_CI_G0_L3_1 | I ^ -> Z ^ | bufbda | 0.369 | -0.887 | 0.181 |
| AZ_ccl_BUF_clk_CI_G0_L4_1 | I ^ -> Z ^ | bufbdf | 0.355 | -0.532 | 0.536 |
| AZ_ccl_BUF_clk_CI_G0_L5_1 | I ^ -> Z ^ | buffda | 0.343 | -0.190 | 0.879 |
| AZ_ccl_BUF_clk_CI_G0_L6_1 | I ^ -> Z ^ | bufbdf | 0.336 | 0.146 | 1.214 |
| start_sync/sync_chain_reg[1] | CP ^ -> Q v | dfcrq2 | 0.694 | 0.839 | 1.908 |
| FE_OCPC112_start_D | I v -> ZN ^ | invbd7 | 0.158 | 0.997 | 2.066 |
| FE_OCPC113_start_D | I ^ -> ZN v | invbdk | 0.113 | 1.110 | 2.178 |
| FE_OFC91_start_D | I v -> Z v | bufbda | 0.548 | 1.658 | 2.726 |
| gen_ctrl_slices[29].ctrl_slice_x/start_del_reg_D_r | D v | dfcrn1 | 1.032 | 2.690 | 3.758 |
| eg | | | | | |
+--------------------------------------------------------------------------------------------------------+
Clock Rise Edge 0.000
= Beginpoint Arrival Time 0.000
Other End Path:
+-------------------------------------------------------------------------------------------------------+
| Instance | Arc | Cell | Delay | Arrival | Required |
| | | | | Time | Time |
|----------------------------------------------------+------------+--------+-------+---------+----------|
| | clk_CI ^ | | | 0.000 | -1.068 |
| AZ_ccl_BUF_clk_CI_G0_L1_1 | I ^ -> Z ^ | bufbdf | 0.272 | 0.272 | -0.796 |
| AZ_ccl_BUF_clk_CI_G0_L2_1 | I ^ -> Z ^ | buffda | 0.303 | 0.575 | -0.493 |
| AZ_ccl_BUF_clk_CI_G0_L3_2 | I ^ -> Z ^ | bufbda | 0.270 | 0.845 | -0.223 |
| AZ_ccl_BUF_clk_CI_G0_L4_2 | I ^ -> Z ^ | bufbdf | 0.301 | 1.147 | 0.078 |
| AZ_ccl_BUF_clk_CI_G0_L5_4 | I ^ -> Z ^ | bufbdf | 0.315 | 1.462 | 0.393 |
| AZ_ccl_BUF_clk_CI_G0_L6_18 | I ^ -> Z ^ | buffda | 0.292 | 1.754 | 0.686 |
| gen_ctrl_slices[29].ctrl_slice_x/start_del_reg_D_r | CP ^ | dfcrn1 | 0.003 | 1.758 | 0.689 |
| eg | | | | | |
+-------------------------------------------------------------------------------------------------------+

- - - Updated - - -

Hi all,

I found something interesting related to it.

If I do a report_cocks, I see my clocks. Playing with all the options of report_clocks, I don't see anything suspicious.

If after the enclosed report above, a do a reset_clock and then I recreate my clock, as propagated, and re-run the report_timing above, the -1.950 is gone.
After this, looking at the same timing report,the -1.950ns is gone.
And I can't find any difference in the report_clocks before and after, that could explain.

For information, I am using the Foundation Flow, and using Encounter 14.20.

Hope it helps converging to an understanding of the situation ...
 
Last edited by a moderator:

Re: Question about post cts encounter negative insertion dealy

this is a bug related to clock propagation. it usually fixes itself if you have real pads driving the clock input. by the way, encounter is super old. update to innovus as soon as you can.
 

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