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  1. #1
    Member level 4
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    TimeQuest analysis for pulse width

    For a design, I changed the number of inputs and the bit width of the numbers. So, the synthesized design becomes large or smaller depending on the input sizes. However, the logic is the same. For example, for 10 numbers, 10 registers are used while for 400 numbers, 400 registers are used.

    Using the timequest tool, I have noticed that the minimum pulse width (used for determining the clock period) and slack time are the same for large and small sizes. Is that normal? Since for big inputs, a larger area of the chip is used, I expect to see clock pulse differences.

    Maybe I missed something. Please let me know.

    •   Alt13th July 2017, 11:18

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  2. #2
    Advanced Member level 3
    Points: 3,955, Level: 14

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    Re: TimeQuest analysis for pulse width

    Without knowing what the design actually is, no way to tell. Sounds like your design is really simple.
    Really, I am not Sam.



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