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    question about CMT of the spartan 6

    Hi every one,
    I underestood that the model of spartan 6 which I'm working on it(XC6SLX150) has 6 CMT so it has 6 PLL and 12 DCM. I have two question now:
    1- I run clocking wizard on my ISE and there I understood there are three modes which I can select *DCM_SP--->which contains to mode, DCM to PLL and PLL to DCM.
    *DCM_CLKGEB
    *PLL_BASE
    so we just choose one of these modes and we can up to 6 outputs of each CMT in this FPGA. it means we can't use pll, DCM0 and DCM1 to have more output separately?
    2- in clocking wizard I can just set the settings for one DCM, so how can I use other 5 DCMs? if no why?if yes how can I do it?
    Regards
    Matin

    •   Alt12th July 2017, 12:20

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  2. #2
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    Re: question about CMT of the spartan 6

    Quote Originally Posted by matin-kh View Post
    2- in clocking wizard I can just set the settings for one DCM, so how can I use other 5 DCMs? if no why?if yes how can I do it?
    Regards
    Matin
    Run the clocking wizard 5 more times with the settings you want, then instantiate all six of the resulting IP into your design. As long as you've correctly picked the pins for the input clock you shouldn't have to specify any of the DCM/PLL locations. If the plan is to have only one clock input to the FPGA then you can run the clock through a BUFG first then to the DCM/PLL in the CMTs, though this means the tools won't compile the design with compensation for the extra clock insertion delay due to the BUFG.


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