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Is MOSFET gate in danger of being electrostatically damaged?

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treez

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Hello,
We have a linear regulator with a FET in it as in the attachement.
We barely have room for a 22k gate_source resistor to protect the gate from electrostatic damage, so we have left it out.
Do you think that whilst the circuit is switched OFF, the FET will be overly sensitive to electrostatic damage of its gate?
 

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Hi,

a 22k gate_source_resistor surely won´t protect your FET against electrostatic damage.

What do you mean by "circuit is switched OFF"?
* Disconnecting AC mains? Where?
* Or just making the OPAMP input = zero?

...

Usually the OPAMP output will be limited to GND and VCC. Maybe with dedicated protection diodes. So as long as the OPAMP output is connected to the gate (with 220R) and all other source-GND-OPAMP are connected, then I don´t see a problem for gate-source.

But there is no protection against overvoltage on drain-source.

Klaus
 
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Thanks , by "switched off" i mean all sources of electrical power are disconnected from it.
Surely the 22k resistor will at least make sure that at power up, the mosfet will be OFF, and will not be enhanced ON by any charge which may have gotten induced into its gate_source capacitance?
 

Also, surely a GS resistor prevents the gradual accumulation of charge into the GS capacitance, thus preventing potnetial overvoltage of the GS capacitor?
 

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