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  1. #1
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    Quartus not show the port size correctly

    There is a entity with 32 bit integers and the simulations on active-hdl student edition works fine. On Quartus however, I see that the port sizes are 5 which is shown as [4..0]. Please see the picture which I highlighted that.

    Code:
    package types is				 
    	constant bitWidth: integer := 32;
    end;
    entity cmp is 
    	port (x, y: in integer range 0 to bitWidth-1;
    		  s, b: out integer range 0 to bitWidth-1);
    end;
    What does that mean?

    •   Alt15th June 2017, 23:12

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  2. #2
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    Re: Quartus not show the port size correctly

    You don't seem to understand that you have defined the range of x, y, s, and b as 0 to 31. So the values of x, y, s, and b can only be 0-31 which means they only need to be 5-bits wide, i.e. 00000-11111.

    The constant being named bitWidth is poorly named. It's more of a endOfRange or maxValue, etc.


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    •   Alt16th June 2017, 02:57

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  3. #3
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    Re: Quartus not show the port size correctly

    Quartus has done its job exactly as you specified..
    If you want 32 bit integers, then remove the range specification from the ports.

    PS. Integers are limited to 32 bit integers in quartus an modelsim, so you cannot have integer range 0 to 2^32-1. Integers max out at 2^31-1


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