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difference betwween libraries for the same process technology

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oAwad

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Hello all,

What is the difference between different std cell libraries for the same process technology (i.e. 45 nm) ?...for example, does the transistor models or the interconnect characteristics (i.e. separation between wire of same metal) differ ?
 

It may be different width/length of transistor gates (different cell area, different cell delay, different power). It may be different transistor models - transistors with different voltage threshold. It may be different list of cells in libraries (more buffers, less types of flip-flops, special cells etc).

Interconnect characteristics usually the same - used the smallest width and spacing. The difference here is possible if different number of metal layers (1 or 2) used in the cell (cost is different cell area).

It may be radiation hardened library (special schematic and layout rules).
 

Hello all,

What is the difference between different std cell libraries for the same process technology (i.e. 45 nm) ?...for example, does the transistor models or the interconnect characteristics (i.e. separation between wire of same metal) differ ?

few days back, i am also having the same question. Once u go through the documentation of the library. they clearly mentioned everything like different cells core cells libs, coarse grain cell library, power efficient libraries, n-well coarse grain, multibit ff std cell libs with diffeerent track no. and with different poly pitch , different gate thickness etc., etc., manythings for a one process technology.
 

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