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A pseudo-random number generator

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Binome

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You could make init_seed a port - connect it to a register map from a CPU and have the software set the seed and reset the design?
 

OK but the FPGA can not be separated from the CPU as a standalone component.
 

True randomness in an FPGA is very hard to configure and doesnt really exist.
I have heard of people creating ring oscilators around the outside of the FPGA with large delays between luts so that combinations of the long routes and tempurature will give them some good randomness, but I have never seen it implemented.
Hence why most people just use code similar to yours

Why not just set the init_value to something non-zero when you instantiate the block?
 

I'll see on the used board if something could be this non-zero value.
Thank you.
 

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