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    I2C with Picoblaze processor

    Hi,
    I am trying to understand I2C using Picoblaze processor
    https://www.xilinx.com/support/docum...tion/ug129.pdf
    used in one reference design
    https://www.xilinx.com/support/docum...56-over-ip.pdf
    for
    https://www.silabs.com/documents/pub...ets/Si5324.pdf
    with address : 1101 000 R/W

    Now I also need to control another components (in parallel with above one) with I2C with address : 1001 000 R/W.

    Trying to find where is the address used in the program but unable to find.

    As per picoblaze documenation(timing diagram page 47 and 50), address is in PORT_ID[7:0] which is coming 8 LSB bits from INSTRUCTION[17:0].
    As per page 55 this INSTRUCTION[17:0] is coming from Block RAM. In block RAM of size 4096 with 9 bits width has initial value of 4096 written in one .coe file.
    I didn't find where is the address 1101 000 R/W for Si5324. AS I mentioned my aim is to use 1001 000 R/W address to control another component in parallel.
    Verilog/VHDL file is in attachments.

    Any hints?

    •   Alt7th June 2017, 11:33

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  2. #2
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    Re: I2C with Picoblaze processor

    The design is controlled by the program residing in the KCSi5324.txt file, the INIT_XX lines in that file are the program, which it says in the comments are defined by 'KCSi5324.psm' which you don't seem to have. Somewhere in that code will be operations that use the address they are using.

    You will have to modify the psm file or write your own program.



    •   Alt7th June 2017, 17:08

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  3. #3
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    Re: I2C with Picoblaze processor

    Hi,
    If you look page 62 of 1st link, it states that:
    "The PicoBlaze assembler generates a VHDL file in which a block RAM and its initial contents are defined."

    But there is no picoblaze assembler is used in the reference design and there is also no .psm file available.

    and in page 63 it states that:
    "KCPSM assembler generates a memory coefficients file (*.coe). Using the Xilinx
    CORE Generator™ system, create a block ROM using the *.coe file."

    .coe file which is used in combination with block RAM is in attachment.

    From my understanding they are just using already picoblaze assembler generated VHDL and .coe file in the reference design for that component with address : 1101 000 R/W. This means I need to install separate Picoblaze assembler in my PC and generate VHDL and .coe file for 2 components (one with already available there and other which I want) and then used these files in the reference design.

    don't know how to use picoblaze assembler to generate such files with 2 different address.
    Any Idea?



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