kenambo
Full Member level 6
Hi All,
I have a whole design of a testchip where the analog part is imported as Macro. I can easily do power analysis for the digital part except Macro in VOLTUS. So how to do power analysis for the whole chip including the macro by using VOLTUS?
I can generate power grid library for the testchip except macro. When I try to generate power grid library for the Macro it need some input files. One of the input file is spice subcircuit file . Is that same as extracted spice netlist ?
Please clarify the above things
Thanks.
I have a whole design of a testchip where the analog part is imported as Macro. I can easily do power analysis for the digital part except Macro in VOLTUS. So how to do power analysis for the whole chip including the macro by using VOLTUS?
I can generate power grid library for the testchip except macro. When I try to generate power grid library for the Macro it need some input files. One of the input file is spice subcircuit file . Is that same as extracted spice netlist ?
Please clarify the above things
Thanks.