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Simulation of OR1200 Open RISC processor in Xilinx ISE

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Hello all,

I'm trying to simulate the OR1200 processor (downloaded from open cores) in Xilinx ISE design suite, I just want to run some of the instructions from the processor's instruction set. I'm finding difficulty in getting/creating a test bench, since my experience is in VHDL not Verilog. Can anybody help me how to simulate it ?

I need to know how to load the instructions to the processor and I don't need to simulate any of the peripherals (just how the CPU works).



Thanks
 

For RTL simulation, you can write some C code which should be correctly compiled and using the proper tool-chains, get the HEX file out of it.
You test-bench for the processor should be capable of loading the hex data in this hex-file into the processor instruction memory. Once fully loaded, the processor executes the instructions and you can follow the waveforms as to what is happening.
 

You can write a VHDL testbench and run the simulation in mixed mode. ISE allows that as Xilinx's own cores use a mix of VHDL and Verilog.
 

dpaul said:
For RTL simulation, you can write some C code which should be correctly compiled and using the proper tool-chains, get the HEX file out of it.
You test-bench for the processor should be capable of loading the hex data in this hex-file into the processor instruction memory. Once fully loaded, the processor executes the instructions and you can follow the waveforms as to what is happening.
Click to expand...

I have been trying to install the OR1K toolchain but didn't succeed. Since all what I want to do is to run just 2 or 3 instructions, can I write them in hex manually depending on the instruction format in the manual ?

So in the case of 2 input instructions, the hex file will be just 2 lines....or it doesn't work this way ?
 

Just load your instruction memory with some OR1200 instructions using readmemh or whatever the equivalent is in VHDL. Then release the reset on the processor, if everything is hooked up correctly in the testbench the processor should fetch the instruction from the instruction memory. Depending on the instruction format it's probably 2 hex words but might be more if it's some indirect addressing mode or a jump instruction. (I don't know the OR1200 processor instructions)
 

I have been trying to install the OR1K toolchain but didn't succeed.
Click to expand...
Do you have restriction of studying only the OR1200?
If not then you can study the Xilinx uBlaze uP. From toolchains to hw, everything is properly documented and available for free.

So in the case of 2 input instructions, the hex file will be just 2 lines....or it doesn't work this way ?
Click to expand...
If you are sure of what you are doing, you can do this. Like copying data from one reg to another can be a very simple instruction. I am not familiar with OR1200.
You should also pay attention to post #5.
 

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