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How to implement a ring oscillator with routings of FPGA? Where to start?

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msdarvishi

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Dear all,

I would like to implement a ring oscillator on a Zynq 7000 FPGA using Vivado Design Tool. I have looked to the PUF ring oscillator and etc. But, I do not know how can I configure a ring oscillator using routings between SLICEs and Switch Boex, then connect them to a LUT employed as an inverter?! The number of inverters must be a prime number though.

Can anyone kindly help me where to start to do this implementation? Should I use Tcl scripts or VHDL coding, or both of them? Can anyone provide me a VHDL or Tcl script code for implementation of this kind of ring oscillator?

Kind replies are in advance appreciated.

Thanks and Regards,
 

You will need to use vhdl and lots of attributes to ensure that vivado does not optimise all your logic away. You will also need logic locks to ensure you get the routing distances required to get near your required frequency.

And also note, FPGA routing to affected by process, voltage, temperature. So the​the results will be different on two different chips, and vary with temperature. Oscillators on FPGAs will not give very determinate results and vary wildly.
 

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