[SOLVED] Drain and Source of MOS

Hello folks,

maybe stupid question, so bare with me

Is source and drain of MOSFET exchangeable?, i.e Ids current is bidirectional. when I see their layout, they are the same. So, always we are concerned about where to connect the drain and the source?

I believe in power MOSFET, this is different because the layout is different, so Ids is always flowing from Drain to source

Any one can clarify these basics?

thanks

Hi,

Basically with FETs I_ds can be in both directions.

The problem with MOSFETs is the internal body diode.
The diode will become conductive in reverse direction independent whether the Mosfet is ON or OFF.

Usual voltage drop in body diode will be > 0.6V, but as soon as the FET is ON the voltage drop will be I_ds x R_ds_on.

Klaus

KlausST said:

Hi,

Basically with FETs I_ds can be in both directions.

The problem with MOSFETs is the internal body diode.
The diode will become conductive in reverse direction independent whether the Mosfet is ON or OFF.

Usual voltage drop in body diode will be > 0.6V, but as soon as the FET is ON the voltage drop will be I_ds x R_ds_on.

Klaus

Click to expand...

It means it doesn't matter if we connect the exchange the drain and the source of the pMOS or nMOS in a logic inverter?

Does the issue of body effect VSB arise here? i.e, if you exchange D with S, apparently Body is connected to +VDD and GND are now connected to Drains instead of Sources and hence VSB is not zero, what do you think?

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Also, is the internal diode a problem in all mosfets or only power mosfets?

Problem is that you didn't specify the involved MOSFET type clearly.

Small signal MOSFET cells involved in IC design are fully symmetric, also some discrete MOSFET transistors with separate bulk terminal. With these MOSFETs, source and drain are interchangeable. All quantities in MOSFET equations refer to actual source and drain assignment.

FvM said:

Problem is that you didn't specify the involved MOSFET type clearly.

Small signal MOSFET cells involved in IC design are fully symmetric, also some discrete MOSFET transistors with separate bulk terminal. With these MOSFETs, source and drain are interchangeable. All quantities in MOSFET equations refer to actual source and drain assignment.

Click to expand...

I see!
Let us assume I have nMOS discrete transistor with four available terminals, terminals in the data sheet are like: 1=Gate, 2=Source, 3=Drain, 4=Body

based on your post, when I connect 3 to 4 terminals together, terminal 3 becomes the source then, VSB=0, right?

Basically yes. It's a matter of viewpoint, if you consider the bulk connected terminal "source" or that with the more negative potential.

Another point, even a transistor with separate substrate terminal must not necessarily be fully symmetric. I e.g. have Siliconix/LinearSystems SD211 (lateral DMOS), they have separate substrate, but asymmetrical capacitance and voltage rating, probably also different gm when flipping source and drain.

But IC MOSFET cells are actually symmetrical, just look at the design kit documents.