oAwad
Full Member level 2
Hello all,
When designing the clock tree for a design in SoC Encounter, can I specify certain clock delays for certain gates ? (for example I need the clock of gate x to rise after 0.2ns from the I/O clock pin rise). Is it possible to do this in the clock tree specification file ?
Thanks
When designing the clock tree for a design in SoC Encounter, can I specify certain clock delays for certain gates ? (for example I need the clock of gate x to rise after 0.2ns from the I/O clock pin rise). Is it possible to do this in the clock tree specification file ?
Thanks