Resonance found between probe (finite inuctance) and circuit

Resonance found between probe (finite inductance) and circuit

Dear All:

I have designed a 30GHz PLL which I plan to use probe for testing. There are approximated 100pF equivalent cap between VDD and VSS inside the chip after C+CC extraction. The probe is estimated to have about 20pH inductance (with Q>20??) each and I have 4-Pad for VDD supply. When I insert a Vsin in series with the ideal power supply I measure the "VDD" after the probe inductance, and found that there is always a resonance around 1GHz with 2dB peak. It seems that adding more Decap on-chip does not help attenuate the resonance anymore. I will be very appreciated if someone can share experience on this suggesting what should I do in the last few days before tapeout and during measurement. In fact, this may explain why we can get a better phase noise result before when we did wirebonding and measurement on PCB with LDO, compared to on chip probing.

Thanks in advance!

Maybe you want to de-Q the decoupling. Stiffer is not
better when you are seeing resonances.

I would also consider the probe model, simple inductance
and nothing but, is not likely the reality. You have some
transition to a tline probably, some skin effect and probe
length resistance and some capacitance to "wherever".

If this is a professionally built probe card from a major
vendor in the RF space, they ought to have some info
for you.

Chip-on-board is almost always better than probe card.
You can design what you want other than the last mm or
two, and bond wire info is pretty well known.

You also do not mention the ground's contribution to all
this. It should be considered an "equal partner" (in crime).