Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

MOSFET channel segmentation

Status
Not open for further replies.

amir_rch

Junior Member level 3
Joined
Dec 10, 2015
Messages
26
Helped
1
Reputation
2
Reaction score
1
Trophy points
3
Activity points
205
A long-channel MOS device can be viewed as a series connection of several short intrinsic MOS devices with the drains and sources of adjacent devices connected to each other. If a device of length L μm is broken into N segments, each of the channel segments has length of
L/N μm.
how to spurious overlap capacitances and junction diodes need to be turned off for the sub-devices that are not connected to the drain or source of the composite device, as shown in figure ?
how to nulling the parameters CGS0, CGS1, CGD0, CGD1 and CGB0 will zero the ov 212.jpgerlap capacitance.
 

I don't agree with this. I have found that (say) two 0.5um
long devices in cascode (self-cascode, common gate) act
differently than one L=1.0um. Built, tested. You can "view"
it how you like, just saying that you're probably missing
some of reality.
 

If you have a long-channel transistor, and its (accurate) SPICE model - why do you anything else? Why do you want to fracture it?

Often, people do the opposite - stacking several transistors in series, to increase their breakdown voltage.
In that case, each device has a correct SPICE model, so overall behavior of the simulation model is very accurate...
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top