0 definitions of operator "+" match here [ERROR]

Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
library UNISIM;
use UNISIM.VComponents.all;
 
entity segmentdriver is
  Port (
 
  display_A : in std_logic_vector(3 downto 0);
  display_B : in std_logic_vector(3 downto 0);
  display_C : in std_logic_vector(3 downto 0);
  display_D : in std_logic_vector(3 downto 0);
  segA : out std_logic;
  segB : out std_logic;
  segC : out std_logic;
  segD : out std_logic;
  segE : out std_logic;
  segF : out std_logic;
  segG : out std_logic;
  select_Display_A : out std_logic;
  select_Display_B : out std_logic;
  select_Display_C : out std_logic;
  select_Display_D : out std_logic;
  clk : in std_logic
 
   );
end segmentdriver;
 
architecture Behavioral of segmentdriver is
 
--component declaration
 
COMPONENT segmentdecoder
Port(
 
Digit : in std_logic_vector(3 downto 0);
segment_A : out std_logic;
segment_B : out std_logic;
segment_C : out std_logic;
segment_D : out std_logic;
segment_E : out std_logic;
segment_F : out std_logic;
segment_G : out std_logic
);
end COMPONENT;
 
COMPONENT clock_divider
Port(
 
clk : in std_logic;
enable : in std_logic;
reset : in std_logic;
data_clk : out std_logic_vector(15 downto 0) 
 
);
 
end COMPONENT;
 
Signal temp_data : std_logic_vector(3 downto 0);
Signal clock_word : std_logic_vector(15 downto 0);
Signal slow_clock : std_logic;
 
begin
 
-- component instantiation
 
uut: segmentdecoder Port Map(
 
Digit => temp_data,
segment_A => segA,
segment_B => segB,
segment_C => segC,
segment_D => segD,
segment_E => segE,
segment_F => segF,
segment_G => segG
);
 
uut1: clock_divider PORT Map(
clk => clk,
enable => '1',
reset => '0',
data_clk => clock_word
);
 
slow_clock <= clock_word(15);
 
Process (slow_clock)
 
variable display_selection : std_logic_vector(1 downto 0);
 
Begin
 
if slow_clock'event and slow_clock = '1' then
 
case display_selection is 
 
when "00" => temp_data <= display_A;
 
select_Display_A <= '0';
select_Display_B <= '1';
select_Display_C <= '1';
select_Display_D <= '1';
 
display_selection := display_selection + '1'; -- 0 definitions of operator "+" match here [ERROR]
 
when
"01" => temp_data <= display_B;
 
select_Display_A <= '1';
select_Display_B <= '0';
select_Display_C <= '1';
select_Display_D <= '1';
 
display_selection := display_selection + '1'; -- 0 definitions of operator "+" match here [ERROR]
 
when 
"10" => temp_data <= display_C;
 
select_Display_A <= '1';
select_Display_B <= '1';
select_Display_C <= '0';
select_Display_D <= '1';
 
display_selection := display_selection + '1'; -- 0 definitions of operator "+" match here [ERROR]
 
when
others => temp_data <= display_D;
select_Display_A <= '1';
select_Display_B <= '1';
select_Display_C <= '1';
select_Display_D <= '0';
 
display_selection := display_selection + '1'; -- 0 definitions of operator "+" match here [ERROR]
 
end case;
end if;
end process;
 
end Behavioral;