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Ram accessing through VHDL code.

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abhijithr1

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Hi,
I am Abhijith . I am new to VHDL programming , i want to read data from RAM and the RAM ic is IDT70V08S/L this is high speed dual ported ram . In our design we have Micro controller and FPGA connected to this dual ported RAM , microcontroller writes to the RAM in address 0x00 to 0xff and FPGA should read data from 0x00 and write from the address 0x100 so that micro-controller should read the data which it has written but from different memory location .
 

you will need to design a memory controller in VHDL that performs read / write operations. This is not a beginners project. Your FPGA vendor provides IP cores, you can also search on opencores.org if you can find an SRAM controller that works with your memory. I don't know of any, never worked with assynchronous SRAM. Be sure you read the datasheet carefully.

What FPGA are you using?
 

I have never seen dedicated SRAM controller IP.

Question 1: Which FPGA internal data path is connecting to the SRAM? Is it e.g. a streaming interface?

Question 2: What's the reason to use the external dual port RAM instead of implementing it in FPGA block RAM?

Driving an asynchronous RAM from FPGA is simple and straightforward.
 

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