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design of reversible t flip flop

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shashi106

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Hii..I am doing project on designing t flip flop using reversible gates(SG gate and Feynman gate)..My code is structural code with no reset input,only T and clock are inputs and Q is the output.The output toggles when clock and T is 1 but does not hold the state upto next T=clk=1.What could be the reason? also I am finding difficult to initialize the flip flop output Q to some value as there is no reset.
Please help.

Thanks in advance.
 

Apparently you didn't design a FF. Show the circuit.
 

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