19910219
Newbie level 4
HI folks.
I'm new for layout design and I'm facing the problem about Unmatched Schematic instances in LVS.
I generate every single MOSFET by "selected from source" and a part of them is on this problem.
I checked every pins of them and I thought they are all right. And When I click" ZOOM" in "Schematic Info" in "Devices Mismatch Tool". CDS.log shows "*WARNING* (GE-2133): The object XXXX does not exist in cellview pgchip/layoutsch/schematic. To create a probe, provide the name of an object that exists in the cellview.
Probed schematic device:/XXXX, no mapping to layout device"
BTW, I use 0.18um pdk from IBM.
Do you know what's this problem?
I'm new for layout design and I'm facing the problem about Unmatched Schematic instances in LVS.
I generate every single MOSFET by "selected from source" and a part of them is on this problem.
I checked every pins of them and I thought they are all right. And When I click" ZOOM" in "Schematic Info" in "Devices Mismatch Tool". CDS.log shows "*WARNING* (GE-2133): The object XXXX does not exist in cellview pgchip/layoutsch/schematic. To create a probe, provide the name of an object that exists in the cellview.
Probed schematic device:/XXXX, no mapping to layout device"
BTW, I use 0.18um pdk from IBM.
Do you know what's this problem?