doost4
Junior Member level 3
Hi
I'm new to this forum and FPGA design. right now I've developed a software for fault injection. for assessing the design reliability, I need to change the Flip Flops values and track the changes in the design outputs.
The problem is, I don't know how to read the design outputs after I program the design on FPGA. I implement the design on Spartan 6 board using Xilinx ISE 14.7 software. Is there anyone help me cope with this problem?
Thanks
I'm new to this forum and FPGA design. right now I've developed a software for fault injection. for assessing the design reliability, I need to change the Flip Flops values and track the changes in the design outputs.
The problem is, I don't know how to read the design outputs after I program the design on FPGA. I implement the design on Spartan 6 board using Xilinx ISE 14.7 software. Is there anyone help me cope with this problem?
Thanks