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IP modules missing in Vivado testbench

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MOd24

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hello everyone,

I am trying to set up a VHDL testbench for my project in Vivado. I want to make a simulation from the top level perspective and not just simulating an IP core. Vivado already added the HDL wrapper for the simulation, but I'd rather use my own testbench instead of the wrapper.

I started creating a new file, copied and pasted instantiation of a module however, that module then appears with a question mark in the sources explorer indicating that the module is not recognized.

When I instantiate the block design wrapper the module is recognized.

In the simulation settings, the simulation set is the same, my testbench is in the same directory as the HDL wrapper and 'include all design sources for simulaiton' is checked.

so why is it not working???
 

I have never had that problem, so unless you give a more detailed explanation and post some screen captures of what you are seeing. It going to be hard to determine your problem.

Was the IP's xci file added to the project?
 

What I did was opening a demo design from Digilent.
In simulation sources, there was already listed the hdl wrapper "hdmi_in_wrapper" which instantiates the board design (bd) "hdmi_in.bd"

I then created a new source file for simulation "hdmi_in_tb.vhd" and copied the entity declaration and instantiation of one of the modules from the wrapper into that file.

In the screenshot you can see the module is marked with an questionmark... the same module is listed below in the hdmi_wrapper.









The ipcore is from diligent. there is no xci file.
 

The file hdmi_in.bd has an hdmi_in_rgb2vga.xci instantiated in it (about 2/3 of the way through the first and second images). Unless you add that to the project or compile the unused BD, which you still have as part of the project (though you aren't instantiating it in your testbench, hence it's at the same level as your testbench).

The methodology you are using to test this hdmi_in_rgb2vga is not very good. I would first create a different project and reference only the files you need from the old project. You probably need to build the original project so all the files for the BD are generated properly, otherwise there are likely files that are missing from the project like simulation outputs.
 
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