scorp_nn
Newbie level 4
Hi all!
I'm going to implement the project. I'm using syn0psys. I have some questions.
1. What order of DFT and BSD insertion is correct?
- DFT ==> BSD, then the generated BSD logic will be unscannable, which will inevitably reduce the test coverage;
- BSD ==> DFT, then the scan chains will cover all the logic, including BSR + TAP, however BSR cells participation in the ATPG test will dump it. I think it is possible in this case to prohibit the logic of BSR and / or TAP to participate in the creation of scan chains (dont_touch), but it will reduce the test coverage.
I'm Interested in common approaches. $yn0p$y$ offers user guides for each tool separately, but I have not found any information about the sequence of their application.
2. The pads in the design are collected in a separate module (not in the TOP). Can I tell BSD Compiler where they are? Or they necessarily should be in TOP?
Thank you!
I'm going to implement the project. I'm using syn0psys. I have some questions.
1. What order of DFT and BSD insertion is correct?
- DFT ==> BSD, then the generated BSD logic will be unscannable, which will inevitably reduce the test coverage;
- BSD ==> DFT, then the scan chains will cover all the logic, including BSR + TAP, however BSR cells participation in the ATPG test will dump it. I think it is possible in this case to prohibit the logic of BSR and / or TAP to participate in the creation of scan chains (dont_touch), but it will reduce the test coverage.
I'm Interested in common approaches. $yn0p$y$ offers user guides for each tool separately, but I have not found any information about the sequence of their application.
2. The pads in the design are collected in a separate module (not in the TOP). Can I tell BSD Compiler where they are? Or they necessarily should be in TOP?
Thank you!