Connect ADC and DAC to matlab filter VHDL

I must be really stupid because I can't seem to find the answer online after a long time searching.

My system consists of ADC -> Decimation filter (matlab) -> DAC
I got the ADC , DAC , clkdiv all working with relative ease but I'm having troubles with a simple step.

The ADC / DAC is 12 bit , 2.048V reference . My filter accepts +-2V fixed point

Input word length 12 bit , input fractional length 10 bit fixed point
Output word length 12 bit , output fractional length 10 bit fixed point

Matlab filter picture:



So what I need to do seems fairly simple , convert the 12 bit binary from the adc to the above mentioned 12b fixed point.
In C/C++ I would have this working in no-time but I'm fairly new to VHDL and need help with this.

Since the reference is 2.048V , the adc 12 bit (4096 steps), each step = 0.0005V
logic says float / real ADCOUTV = 12 bit binary value * 0.0005V and after convert this float / real to the mentioned fixed point format.

I also read that it might not be smart to use floating point / real in VHDL , is there a simpeler way to get this done ?

I'm really struggling with this conversion and would greatly appreciate if anyone can give me tips or help me.
Kind regards,
Ths

What? First you ask about MATLAB, then all of a sudden, VHDL? Please clarify. Are you trying to generate VHDL code from matlab?

barry said:

What? First you ask about MATLAB, then all of a sudden, VHDL? Please clarify. Are you trying to generate VHDL code from matlab?

Click to expand...

I made a filter in matlab , trying to connect my ADC / DAC to it.

I don't understand what's the exact question. You have already defined and simulated a fixed point FIR filter in Matlab, it can be directly converted to VHDL. You didn't show the coefficient number format, I presume it's fixed point as well.

tsillen said:

I made a filter in matlab , trying to connect my ADC / DAC to it.

Click to expand...

Yeah, so why are you talking about VHDL?

I generated HDL from matlab, trying to connect it to my VHDL adc / dac code.

I see that I have thought wrong, the whole conversion from binary to real / float is not needed. I should just make my fixed point input in matlab so that I can just put the raw binary value in there.
As in 12Q4 for example (the the four fractional bits would just be ignored). Right ?

Yeah, so why are you talking about VHDL?

Click to expand...

The OP didn't tell clearly, but I presume he wants to implement the Matlab designed filter in FPGA hardware.

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I understand the filter parameters so that you have 12 input bits in total 10 of it are interpreted as fractional, resulting in a +/- 2 nominal input range, or more exactly -2.000 ... 1.999.

Yes, that is what I made. But that seems the wrong approach now. I should just make it accept my raw (decimal) ADC value which is up to 4096 so 12Q0 or 13Q0 (or something like that).
Correct?

The filter doesn't care if the 12 input bits are meaned as Q1.10 or Q11.0. (Notation according to https://en.wikipedia.org/wiki/Fixed-point_arithmetic#Notation)

Yes that is correct, only took me a long time to realize.

I will make my changes and come back with the results probably in a day or two!