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Matrix Multiplication using DSP48 slice in 7 series xilinx FPGA

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This code uses inferred multipliers so should just work in a 7 series.
 

The code mentioned in the lik is working fine, but i want to use DSP48 for processing of 500*500 matrix in less clock cycle. Please suggest suitable basic code with dsp48 slice
 

The use of DSP48 is already inferred. What you will need to do to improve the performance is to make the design compute the elements in a more parallel fashion. The DSP48s won't increase the parallelism of the design. You have to change the architecture of the design.
 
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ads-ee is absolutely right. Just want to add this. If you want to use DSP48s for the design, just change the synthesis settings in order to let the synthesizer use DSP48 for synthesis process. If you want to increase the speed of the matrix multiplication, you have to parallelize the architecture or using pipelines.
 
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