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newbie's questions about PAL

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dk_spb

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I need to repair the old computer and need to understand PAL16L8 functions.
I have read it by programmer and got .jed file.
Convert .jed to .eqn file by OPAL Jr. software.
Could anybody help me to answer for few questions about part of this code
Code:
chip p4 PAL16L8

i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11 o12=12 
f13=13 f14=14 f15=15 f16=16 f17=17 f18=18 o19=19 VCC=20 

equations
/f18 = i2 * /i2 * i1 * /i1 * i3 * /i3 * f18 * /f18 * i4 * /i4 * f17 * /f17
      * i5 * f16 * /f16 * i6 * /i6 * f15 * /f15 * /i7 * f14 * /f14
      * i8 * f13 * /f13 * i9 * /i9 * i11
    + vcc
    + vcc
    + vcc
    + vcc
    + vcc
    + vcc
f18.oe = gnd
What means this code "/f18 = ... + vcc" ?. If plus means OR function - result of "+vcc" always TRUE (f18 always TRUE and /f18 always FALSR)?

What means "/f18 = i2 * /i2 * f18 * /f18". It is always FALSE?

Or this code example means "/f18 = i5 * /i7 * i8 * i11" (pairs like "* i9 * /i9" must be ignored) ??
 

Hi,

The equations make no sense.
Maybe the part is defective, read protected, wrong .jed to .eqn ....

Could you upload the complete .jed file? With that low density devices one can reconstruct each fuse to it´s function.

Klaus
 

The equations make no sense.
Maybe the part is defective, read protected, wrong .jed to .eqn ....
I'm glad I'm not the only one that thinks this made no sense. I've never seen a readback part with equations that looked like that. I'm wondering if the original design was modified to disable that output for some reason and hence the readback of all those +vcc terms. I remember doing stuff like that when you didn't want to waste another OTP part to try a possible fix before changing your source file.
 

I have read 10+ different PAL16 (L8 and R4) from board - all with these strange "+vcc" and pairs "* iX * /iX"
 

!!??

Maybe your conversion SW is mangling the results. I'll admit right now even if I looked at the .jed file I wouldn't remember how to interpret the fuse map (the last one I looked at was circa 1992). :-(
 
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    barry

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The vcc part could mean tri-state( or maybe output enable ) because your device has I/O pins? Does your PAL16R4 device show vcc 4 times? I think Palasm has a disassembler so I will try your jed file in that later.

EDIT:
If your devices are read protected they should show all 1's or 0's (0 I think) so it doesn't seem like they have had their fuse blown because you are able to read something off them?
 

If your devices are read protected they should show all 1's or 0's (0 I think) so it doesn't seem like they have had their fuse blown
Thank you very much. Security fuse was a 1st question for me
 

Hi,

Good news.

No. The Jedec file makes sense. they are not protected.

But there must be some problem with your JED2EQN.

16l8.png
Here is the fuse map.
In the jedec files you see many rows with 31 fuses each.
They correspond the the big matrix in the picture.

First row of jedec: beginning wiht "L0 0000..."
corresponds to the first row of the picture.
You see the fuse 14 and fuse 28 are set.
If you follow the lines then you find it means:
O8 enable is true when O5= 1 and I8 = 1
as equation something like: O8_en = O5 & I8

Klaus
 
Last edited:

Thank you very much!
I have tried JEDPAL from PALASM4. Not successful.
Code:
>jedpal.exe p4.jed -dev 16L8
PALASM4  JEDC   - MARKET RELEASE 1.5 (7-10-92)
 (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992

|> ERROR J150
     Input file P4.JED terminated prematurely.
No Boolean equation design file is created.

- - - Updated - - -

I think this JED2EQN need inversed fuses from .jed file
For example,
Code:
L0  00000000000000100000000000001000*
now is 

/o19 = i2 * /i2 * i1 * /i1 * i3 * /i3 * f18 * /f18 * i4 * /i4 * f17 * /f17
      * i5 * /i5 * f16 * /f16 * i6 * f15 * /f15 * i7 * /i7 * f14 * /f14
      * i8 * /i8 * f13 * /f13 * /i9 * i11 * /i11
    + i2 * /i2 * i1 * /i1 * i3 * /i3 * f18 * /f18 * i4 * f17 * /f17
      * i5 * /i5 * f16 * /f16 * i6 * /i6 * f15 * /f15 * i7 * /i7 * f14
      * /f14 * i8 * /i8 * f13 * /f13 * /i9 * i11 * /i11

after inversion
/o19 = /i6 * i9   + /i4 * i9
--------------------------------------
and
L96  11111111111111111111111111111111*
now is +vcc
must be nothing (all zeroes)
 

It looks like the vcc lines correspond to the parts of the jedec file that all have the value 1, so you can try removing those vcc from the equations. They are probably not required, but I haven't used opjr myself. I don't know if you have to declare everything, the software should be able to do it itself without those vcc lines.
I saw some output from jed2eqn elsewhere on the internet and your files look the same as that. It looks strange because there is no structure or comments. You have to add that yourself.
 

Many thank for help!
I have read it by other programmer and get inversed fuses (the same data but inversed).
equation from new programmer
Code:
/o19 = /i6 * i9
    + /i4 * i9
o19.oe = f16 * i9
/o18 = /i5 * i7 * /i8 * /i11
o18.oe = vcc
/o17 = i5 * /i7 * /i8 * /i11
o17.oe = vcc
/f16 = vcc
f16.oe = i4 * i6
/o15 = /i5 * /i7 * /i8 * /i11
o15.oe = vcc
/o14 = i1 * /i3
    + /i1 * i3
o14.oe = vcc
/o13 = /i2 * /i3
    + i2 * i3
o13.oe = vcc
/o12 = vcc
o12.oe = /f16
 

Now this latest code does make sense. Glad to see you figured this out.

If you need to copy this to another part or modify it I suggest you use a GAL16V8 instead of the PAL16L8. At least then you'll be able to reprogram it as many times as needed (hopefully whatever computer this was on can handle a faster device).
 

Could anybody advice me:
Code:
chip p13 PAL16L8

i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11 o12=12 f13=13 f14=14 f15=15 o16=16 f17=17 f18=18 o19=19 VCC=20 

equations

/f18 = i1
f18.oe = vcc
/o16 = /f18
o16.oe = vcc
.....
Does it possible that pin 16 and 18 has a same status as pin 1 (for example, pin1=pin16=pin18="1").
I think that /f18 = i1 means that pin 18 must be inversed value of pin 1..

The real status of these pins always "1" and I think that I need replace broken IC. Is it correct?
 

I'm a newbie too but it looks to me like pin 18 is a copy of pin 1 which is a clock and then pin 16 is a copy of pin 18. The output on pin 18 will be output one clock later than the clock input on pin 1 but will be the inversion of pin1 and pin 16 will be the same? as pin 18 but delayed by one clock. So pin 16 is a divide by two compared to clock input pin1?

From what I have learnt you can then X-OR or X-NOR pin 18 and 16 together and use the result of this inside the PAL in another equation. This is used to eliminate clock errors I think. (waiting for experts to destroy me now)

Is your OE pin connected to GND or controlled by another IC? Probably GND.
 

>copy of pin 1 which is a clock
It is PAL16L8 ("chip p13 PAL16L8"). Pin 1 is not clock pin.

>Is your OE pin connected to GND or controlled by another IC? Probably GND.
It is PAL16L8 without OE pin.
 

Sorry I forgot what device this was, but still pin 1 could be a clock I haven't seen the schematics. Pin 16 is a divide by two of pin 1? OE is really tristate? As I found out myself you will have try things yourself, You are lucky you have received more advice than I got in my thread :)
 

I have replaced IC already. It was broken.
 

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