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[Moved]: capacitive feedback stability analysis ?

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cmos_ajay

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Hello, Attached is a picture of an opamp with capacitive feedback.

I think the load seen by the opamp is = Cf + C1 + diode ON resistance. Is this correct ?
How do I determine the stability of this circuit in Cadence or any spice simulator ?
Thanks.
 

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Re: capacitive feedback stability analysis ?

Since Vin- is a virtual ground, Vout sees only Cf as the load.
But Vout signal is a function of the diode voltage Vf. or Vout= -Vf * Cf/C1.

Actual stability depends on phase margin of OpAmp. and values used in Charge Amplifier.
 

Re: capacitive feedback stability analysis ?

Your circuit will not work because there is no DC path to the inverting input terminal.
 

Re: capacitive feedback stability analysis ?

its a switch capacitor circuit actually. I have drawn only 1 scenario in the picture. Refer to the paper
A 150nA 13.4 ppm/c switched-capacitor cmos sub bandgap voltage reference
 

Re: capacitive feedback stability analysis ?

I see no switched capacitor in your circuit.
 

Please see this paper : A 150nA 13.4 ppm/c switched-capacitor cmos sub bandgap voltage reference
 

Hi,

LvW is correct. There is no DC path to IN- of your OPAMP.

You refer to a paper. Look at it:
In Fig1: there is switch #2 that generates the DC path.
In Fig2: there is switch #1 that generates the DC path.

But in your circuit there are no switches, therefore it will never work.

Maybe you think you can analyze stabliity in the time where all switches are open.
This is impossible, because it only reperesents a very short period of time. But stability is not a question of a very short piece of time, you need to study a the whole feedbacked system for a longer period of time. Within this longer period it is necessary that the switches are activated.
Without the switches the OPAMP output sooner or later is fix at one power supply rail.
(Oh, you could call this "stable" ;-) but surely this is not what you want)

Klaus
 

I understand the research paper improves on the concept of a precision 1.0V ref by measuring the threshold differences of two different types of N ch MOSFETs used in 3.3 and 5V logic designs. Using commutated switches on the ends of the input and output cap can make a charge voltage amplifier temperature compensated to generate a 1.0V ref with only 142 nA at 1.2V.

The Op only want to analyze the AC stability not the DC restoration circuit.
**broken link removed**
 

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