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pmos and nmos cascade with the same G, not inverter

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Fei

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nmos cascade

Hello
I see this in a IO circuit. a pfet and a nfet share a S/D diffusion and gate signal.
and this diffusion is not connected out. the other two sides are connected to internal signals, but not power/ground.
They are not inverter, and can not be other gate.
Do you know what's the function of such circuit?

Thanks~

Fei
 

cascade pmos

From the simple description you had there, it is very difficult to figure out what is really going on. Can you put more info there as context? Or is this circuit used in an analog block or digital block?
 

it sounds like an esd diode
 

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