How to implement an NoC (Network on Chip) in my DE1-SOC (Nios-II, Qsys)?

I was wondering if it's possible to implement a simple Network-on-Chip with for example, 100 Cores, connected with routers in a torus network? What resources of my DE1-SOC can I use for this? Nios-II, Qsys, ARM?

I'm just recently learning to use FPGA and Altera products. I wonder how difficult could be to implement the above. I can read QSYS has an internal NoC, Could I make use of this to implement a simple NoC Application, for example to program the routers and so?

Suppose later that each Core perform a function (an math equation), that requires fixed point divisions, multiplication, sub's and add's..

100 cores of what?
Nios relies on the Avalon Bus - usually with the Nios acting as the master and other units connected via a memory mapped avalon interface.
This way you can have any existing IP or any other IP you chose to design yourself (as avalon is a straight forward interface, very similar to AXI).
NoC is usually a term used for Asic, not FPGA.

TrickyDicky said:

100 cores of what?
Nios relies on the Avalon Bus - usually with the Nios acting as the master and other units connected via a memory mapped avalon interface.
This way you can have any existing IP or any other IP you chose to design yourself (as avalon is a straight forward interface, very similar to AXI).
NoC is usually a term used for Asic, not FPGA.

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Hi tricky are you by any chance in Altera Forum aswell?

AFAIU, NoC is a paradigm of interconnection, with routers smartly controlling traffic in a topology (i.e mesh, torus, etc). QSYS of ALTERA FPGAs says it has something to do with NoC, and I have seen papers where NoC it's implemented in VHDL.

With 100 Cores I mean 100 independent processors, I read it could be done in Nios II?

Yes - same person

It will really depend on the size of your "processors"
If it's 100 integer/fixed point adders/multipliers, then you'll have no problem. 100 floating point and you will struggle. But it wouldnt really make sense anyway as you would struggle to get the data into them quick enough to have them working all the time, so you're better off with fewer processing units that work 100% of the time than more units and less utilisation.

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This is assuming you're only passing in data from the NIOS.
If you streamed data in from another source, then no problem, but from your previous posts I dont think you understand the streaming concept. Usually, for an image, pixels values flow in 1-8 at a time and you process them all in a long processing pipeline (ie. 1 processing unit working)