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    Multi cycle path of N clock cycles

    How to specify the setup and hold for a multi cycle path of clock cycles N. Can anybody specify the correct syntax completely for both setup and hold?

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    Re: Multi cycle path of N clock cycles

    Check the command guide of the tool you are using....



    •   Alt25th November 2015, 14:03

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    Re: Multi cycle path of N clock cycles

    Quote Originally Posted by sharath666 View Post
    Check the command guide of the tool you are using....
    I do not have the guide. It is not dependent on tool. Please provide the exact syntax.



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    Re: Multi cycle path of N clock cycles

    I suppose you are using some tool like Dc compiler and you want to specify a multicycle path constraint for a design...right ???



    •   Alt26th November 2015, 08:36

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    Re: Multi cycle path of N clock cycles

    Yes Synopsys design compiler. I do not have any access now to any manual. There is no way.



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    Re: Multi cycle path of N clock cycles

    Type "set_multicycle_path --help" at the command prompt. It will display the command syntax for you. If I remember right, there are options like -setup and -hold to specify the setup and hold options..



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    Re: Multi cycle path of N clock cycles

    This link may help you.

    http://vlsi.pro/multi-cycle-paths/


    1 members found this post helpful.

    •   Alt26th November 2015, 09:46

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  8. #8
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    Re: Multi cycle path of N clock cycles

    Quote Originally Posted by sharath666 View Post
    Type "set_multicycle_path --help" at the command prompt. It will display the command syntax for you. If I remember right, there are options like -setup and -hold to specify the setup and hold options..
    The question is where the setup and where the hold check should happen and how the set_multicycle_path will appear with that . Please provide that information.



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    Re: Multi cycle path of N clock cycles

    For me, set_multicycle_path is used with below condition:
    - Timing violation on a path.
    - Functional verification prove that, there is more than 1 cycle for capture FF to use the signal propagated from launch FF, on that path.

    Hence, you need to ask Logic designer to provide set_multicycle_path.

    If you dont have it, just start doing without set_multicycle_path, then collect the violated paths and review them. Pass them to designers for their comment on multicycle possibility.

    Hope this helps.



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