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Meaning of statement/ operation performed in following system verilog code

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hulk789

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Code: 
for (i = 0; i < 8; i = i + 1)
	  begin
	     test[8*i+7-:8] = array[326+i];// What is the operation performed?
	  end
What operation does 8*i+7-:8 perform?
 

hulk789 said:
Code: 
for (i = 0; i < 8; i = i + 1)
	  begin
	     test[8*i+7-:8] = array[326+i];// What is the operation performed?
	  end
What operation does 8*i+7-:8 perform?
Click to expand...

This has nothing to do with SV it's straight up 2001 verilog.

The slice defined by:
8*i+7 -:8
results in bytes of a larger bus

and....

Well it's a screwed up way of writing the simpler:
8*i +:8

Basically it's a byte wide slice from a bus taken from the i th byte
e.g.

i=0: eight bits starting from 8*0, 7:0
i=1: eight bits starting from 8*1, 15:8
...
 

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