Vlad.
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Hi,
According to the documentation for kintex-7 XC7K70 FBG484 package, the banks with I/O pins named 33 and 34 are HP type, so the maximum voltage for supply is around 2V (according to the documentation). But in 34 bank I have MRCC pins where I have a SE clock connected, and the bank is supplied at 1.5V and clock at 3.3V, so the amplitude of the clock is 3.3V. This amplitude will damage in time the input of FPGA? what is the maximum input voltage for I/O on this FPGA? I don't find this in any documentations, but i suppose is around 3.3V. I hope you understand my question.
PS: my Kintex works verry well with this problem, but i just want to know.
https://www.xilinx.com/support/packagefiles/k7packages/xc7k70tfbg484pkg.txt
https://www.xilinx.com/support/documentation/data_sheets/ds182_Kintex_7_Data_Sheet.pdf
Thank you.
According to the documentation for kintex-7 XC7K70 FBG484 package, the banks with I/O pins named 33 and 34 are HP type, so the maximum voltage for supply is around 2V (according to the documentation). But in 34 bank I have MRCC pins where I have a SE clock connected, and the bank is supplied at 1.5V and clock at 3.3V, so the amplitude of the clock is 3.3V. This amplitude will damage in time the input of FPGA? what is the maximum input voltage for I/O on this FPGA? I don't find this in any documentations, but i suppose is around 3.3V. I hope you understand my question.
PS: my Kintex works verry well with this problem, but i just want to know.
https://www.xilinx.com/support/packagefiles/k7packages/xc7k70tfbg484pkg.txt
https://www.xilinx.com/support/documentation/data_sheets/ds182_Kintex_7_Data_Sheet.pdf
Thank you.
