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7-Segment 4 Digit display Anode is enabled when 0

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Valerius

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Hello everyone,

I am confused about my BASYS2 FPGA board's common anode seven segment 4 digit display's function. In user manual(and also tested in Verilog code), the desired digit is enabled when the anode is driven to 0(e.g. to enable the rightmost digit the bus should be 1110 each of which represents the anode signal, respectively), which doesn't fit into my understanding. For an anode to be polarized correctly, shouldn't it be 1 to be enabled? To display a number, It makes sense to drive each corresponding kathode to 0. But why anode must be driven to 0 either?

Thank you!
 

The outputs you are driving with the 0 are connected to PNP transistors and not directly to the anode of the LEDs in the display.
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