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[SOLVED] array fillup problem

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nsgil85

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hello you all,

I'm trying to simulate TB that fills series in array of unsigned numbers.
I can't figure out why i get only zeros in this array bellow:


Code VHDL - [expand]
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signal  helper_add_values_to_display_array  : integer range 0 to ((2**simulation_GENERIC_POS_CONF_DISPLAY_DATA_WIDTH) -1) := 0 ;                                                    
                                            
 
begin
    
process_fill_up_display_array:  process
                                    begin
                                    loop_arry: for y in 0 to simulation_GENERIC_POS_CONF_NUMBER_OF_ROWS -1 loop
                                                    simulation_PORT_IN_UNS_ARRAY_DATA_TO_DISPLAY(y)     <= to_unsigned(helper_add_values_to_display_array, simulation_PORT_IN_UNS_ARRAY_DATA_TO_DISPLAY(y)'length);
                                                    helper_add_values_to_display_array                  <= helper_add_values_to_display_array +1;
                                               end loop loop_arry;   
                                    wait ;         
                                end process ;



(i know i can put "y" instead of "helper_add_values_to_display_array" and solve it but i wonder what is the problem)
thank you :lol:
 

You need to learn about the behaviour of signals and processes. helper_add_values_to_display_array is only updated once at the end of the process, it keeps it's previous value of 0 during the loop iteration and is assigned 1 afterwards.

You can use a variable if you want immediate update.
 
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